AM29LV002B_06 Datasheet, PDF (5/41 Pages) Advanced Micro Devices – 2 Megabit (256 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

DATA SHEET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29LV002B Device Bus Operations .............................. 10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 10
Program and Erase Operation Status .................................... 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Pin ............................................... 11
Output Disable Mode .............................................................. 11
Table 2. Am29LV002BT Top Boot Block Sector Address Table..... 12
Table 3. Am29LV002BB Bottom Boot Block Sector Address Table 12
Autoselect Mode ..................................................................... 12
Table 4. Am29LV002B Autoselect Codes (High Voltage Method).. 12
Sector Protection/Unprotection ............................................... 13
Temporary Sector Unprotect .................................................. 13
Hardware Data Protection ...................................................... 13
Figure 1. Temporary Sector Unprotect Operation ...........................13
Low V_CC Write Inhibit .............................................................. 13
Write Pulse “Glitch” Protection ............................................... 13
Logical Inhibit .......................................................................... 13
Power-Up Write Inhibit ............................................................ 13
Figure 2. In-System Sector Protect/Unprotect Algorithms ...............14
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 15
Reading Array Data ................................................................ 15
Reset Command ..................................................................... 15
Autoselect Command Sequence ............................................ 15
Byte Program Command Sequence ....................................... 15
Unlock Bypass Command Sequence ..................................... 16
Chip Erase Command Sequence ........................................... 16
Figure 3. Program Operation ..........................................................16
Sector Erase Command Sequence ........................................ 17
Erase Suspend/Erase Resume Commands ........................... 17
Figure 4. Erase Operation ...............................................................18
Command Definitions ............................................................. 19
Table 5. Am29LV002B Command Definitions................................. 19
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 20
DQ7: Data# Polling ................................................................. 20
Figure 5. Data# Polling Algorithm ...................................................20
RY/BY#: Ready/Busy# ........................................................... 21
DQ6: Toggle Bit I .................................................................... 21
DQ2: Toggle Bit II ................................................................... 21
Reading Toggle Bits DQ6/DQ2 ............................................... 21
Figure 6. Toggle Bit Algorithm ........................................................ 22
DQ5: Exceeded Timing Limits ................................................ 22
DQ3: Sector Erase Timer ....................................................... 22
Table 6. Write Operation Status..................................................... 23
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 24
Figure 7. Maximum Negative Overshoot Waveform ...................... 24
Figure 8. Maximum Positive Overshoot Waveform ........................ 24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9. I_CC1 Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 26
Figure 10. Typical I_CC1 vs. Frequency ........................................... 26
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11. Test Setup ..................................................................... 27
Table 7. Test Specifications ........................................................... 27
Figure 12. Input Waveforms and Measurement Levels ................. 27
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28
Read Operations .................................................................... 28
Figure 13. Read Operations Timings ............................................. 28
Hardware Reset (RESET#) .................................................... 29
Figure 14. RESET# Timings .......................................................... 29
Erase/Program Operations ..................................................... 30
Figure 15. Program Operation Timings .......................................... 31
Figure 16. Chip/Sector Erase Operation Timings .......................... 32
Figure 17. Data# Polling Timings (During Embedded Algorithms) . 33
Figure 18. Toggle Bit Timings (During Embedded Algorithms) ...... 33
Figure 19. DQ2 vs. DQ6 ................................................................. 34
Temporary Sector Unprotect .................................................. 34
Figure 20. Temporary Sector Unprotect Timing Diagram .............. 34
Figure 21. Sector Protect/Unprotect Timing Diagram .................... 35
Alternate CE# Controlled Erase/Program Operations ............ 36
Figure 22. Alternate CE# Controlled Write Operation Timings ...... 37
Erase and Programming Performance . . . . . . . 38
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 39
TS 040—40-Pin Standard TSOP* .......................................... 39
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40
Revision A (January 1998) ..................................................... 40
Revision B (June 1998) .......................................................... 40
Revision B+1 (August 1998) ................................................... 40
Revision C (January 1999) ..................................................... 40
Revision D (November 18, 1999) ........................................... 40
Revision D+1 (November 13, 2000) ....................................... 40
Revision D+2 (June 14, 2004) ................................................ 40
Revision D+3 (January 5, 2006) ............................................. 40
Revision D+4 (September 12, 2006) ...................................... 40
21520D5 October 11, 2006
Am29LV002B
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