AM29LV640MU Datasheet, PDF (32/58 Pages) Advanced Micro Devices – 64 Megabit (4 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with

ADVANCE INFORMATION
Command Definitions
Table 10. Command Definitions
Bus Cycles (Notes 1–4)
Command Sequence (Notes)
Addr Data Addr Data
Read (Note 6)
1 RA RD
Reset (Note 7)
1 XXX F0
Manufacturer ID
4 555 AA 2AA 55
Device ID (Note 9)
6 555 AA 2AA 55
SecSi Sector Factory Protect
(Note 10)
4
555
AA
2AA
55
Addr
555
555
555
Data
90
90
90
Addr
X00
X01
X03
Data Addr Data Addr Data
0001
227E
X0E 2213 X0F 2201
(Note 10)
Sector Group Protect Verify
(Note 11)
4 555 AA 2AA 55 555 90 (SA)X02 00/01
Enter SecSi Sector Region
3 555 AA 2AA 55 555 88
Exit SecSi Sector Region
4 555 AA 2AA 55 555 90 XXX
Program
4 555 AA 2AA 55 555 A0
PA
Write to Buffer (Note 12)
6 555 AA 2AA 55 SA
25
SA
Program Buffer to Flash
1 SA 29
Write to Buffer Abort Reset (Note 13) 3 555 AA 2AA 55 555 F0
Unlock Bypass
3 555 AA 2AA 55 555 20
Unlock Bypass Program (Note 14) 2 XXX A0 PA PD
Unlock Bypass Reset (Note 15)
2 XXX 90 XXX 00
Chip Erase
6 555 AA 2AA 55 555
80
555
Sector Erase
6 555 AA 2AA 55 555
80
555
Program/Erase Suspend (Note 16) 1 BA B0
Program/Erase Resume (Note 17) 1 BA 30
CFI Query (Note 18)
1 55 98
00
PD
WC
PA PD WBL PD
AA
2AA 55 555 10
AA
2AA 55 SA 30
Legend:
X = Don’t care
RA = Read Address of the memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address . Addresses latch on the falling edge of the
WE# or CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on the rising edge of
WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A21–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within the same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells indicate read cycles. All others are write cycles.
4. During unlock and command cycles, when lower address bits are
555 or 2AA as shown in table, address bits higher than A11 and
data bits higher than DQ7 are don’t care.
5. Unless otherwise noted, address bits A21–A11 are don’t cares.
6. No unlock or command cycles required when device is in read
mode.
7. The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when the device is in the autoselect mode, or if DQ5 goes high
(while the device is providing status information).
8. The fourth cycle of the autoselect command sequence is a read
cycle. Data bits DQ15–DQ8 are don’t care, except for RD, PD
and WC. See the Autoselect Command Sequence section for
more information.
9. The device ID must be read in three cycles.
10. The data is 98h for factory locked and 18h for not factory locked.
11. The data is 00h for an unprotected sector group and 01h for a
protected sector group.
12. The total number of cycles in the command sequence is
determined by the number of words written to the write buffer. The
maximum number of cycles in the command sequence is 21.
13. Command sequence resets device for next command after
aborted write-to-buffer operation.
14. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
15. The Unlock Bypass Reset command is required to return to the
read mode when the device is in the unlock bypass mode.
16. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
17. The Erase Resume command is valid only during the Erase
Suspend mode.
18. Command is valid when device is ready to read array data or when
device is in autoselect mode.
June 12, 2003
Am29LV640MU
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