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AM29LV116B Datasheet, PDF (23/40 Pages) Advanced Micro Devices – 16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
PRELIMINARY
must write the reset command to return to reading
array data.
The remaining scenario is that the system initially de-
termines that the toggle bit is toggling and DQ5 has not
gone high. The system may continue to monitor the
toggle bit and DQ5 through successive read cycles, de-
termining the status as described in the previous para-
graph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the
beginning of the algorithm when it returns to determine
the status of the operation (top of Figure 6).
Table 10 shows the outputs for Toggle Bit I on DQ6. Fig-
ure 6 shows the toggle bit algorithm. Figure 18 in the
“AC Characteristics” section shows the toggle bit timing
diagrams. Figure 19 shows the differences between
DQ2 and DQ6 in graphical form. See also the subsec-
tion on DQ2: Toggle Bit II.
START
Read DQ7–DQ0
(Note 1)
Read DQ7–DQ0
Toggle Bit
No
= Toggle?
Yes
No
DQ5 = 1?
Yes
Read DQ7–DQ0 (Notes
Twice
1, 2)
Toggle Bit
No
= Toggle?
Yes
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Notes:
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as DQ5
changes to “1”. See text.
21359C-9
Figure 6. Toggle Bit Algorithm
23
Am29LV116B