AM79535 Datasheet, PDF (11/20 Pages) Advanced Micro Devices – Subscriber Line Interface Circuit

SWITCHING WAVEFORMS
Am79534/Am79535
E1 to DET
E1
DET
tgkde
E0 to DET
E1
tshde
tgkde
tshde
E0
DET
Note:
tshdd
All delays measured at 1.4 V level.
tshd0
tgkdd
tgkd0
16854C-02
Notes:
1. Unless otherwise noted, test conditions are BAT = –48 V, V_CC = +5 V, V_EE = –5 V, R_L = 600 Ω, C_HP = 0.22 µF,
R_DC1 = R_DC2 = 31.25 kΩ, C_DC = 0.1 µF, R_D = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming
impedance (Z_T) = 600 kΩ resistive, receive input summing impedance (Z_RX) = 300 kΩ resistive. (See Table 2 for component
formulas.)
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at V_TX by V_RX. This specification assumes the two-wire AC load impedance
matches the impedance programmed by Z_T.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below
12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system
design. The Anti-sat 2 region occurs at high loop resistances when |V_BAT| – |V_AX – V_BX| is less than approximately 11 V.
8. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included.
10. Assumes the following Z_T network:
300 kΩ
300 kΩ
VTX
RSN
30 pF
SLIC Products
11