AMD27C256 Datasheet, PDF (10/12 Pages) Advanced Micro Devices – 256 Kilobit (32,768 x 8-Bit) CMOS EPROM

AMD
CAPACITANCE
Parameter
Symbol
Parameter
Description
Test
Conditions
CDV028
PL 032
PD 028
TS 032
Typ Max Typ Max Typ Max Typ Max Unit
CIN
Input Capacitance VIN = 0
COUT
Output Capacitance VOUT = 0
Notes:
1. This parameter is only sampled and not 100% tested.
2. TA = +25°C, f = 1 MHz.
8 12 8 12 6 10 10 12 pF
8 12 8 12 8 10 12 14 pF
SWITCHING CHARACTERISTICS over operating range unless otherwise specified
(Notes 1, 3 and 4)
Parameter
Symbols
JEDEC Standard
tAVQV
tACC
tELQV
tCE
tGLQV
tOE
Parameter
Description
Address to
Output Delay
Chip Enable to
Output Delay
Output Enable to
Output Delay
Am27C256
Test
Conditions
-55 -70 -90 -120 -150 -200 -255 Unit
CE = OE = Min –
–
–
–
–
–
–
VIL
Max 55 70 90 120 150 200 250 ns
OE = VIL Min –
–
–
–
–
–
–
Max 55 70 90 120 150 200 250 ns
CE = VIL Min –
–
–
–
–
–
–
Max 35 40 40 50 50 50 50 ns
tEHQZ,
tGHQZ
tDF
(Note 2)
Chip Enable HIGH or
Output Enable HIGH,
whichever comes
first, to Output Float
Min –
–
–
–
–
–
–
Max 25 25 25 30 30 30 30 ns
tAXQX
tOH
Output Hold from
Addresses, CE,
or OE, whichever
occurred first
Min 0
0
Max –
–
0
0
0
–
–
–
0
0
–
–
ns
Notes:
1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. This parameter is only sampled and not 100% tested.
3. Caution: The Am27C256 must not be removed from (or inserted into) a socket or board when VPP or VCC is applied.
4. For the -55 and -70:
Output Load: 1 TTL gate and CL = 30 pF
Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0 V to 3 V
Timing Measurement Reference Level: 1.5 V for inputs and outputs
For all other versions:
Output Load: 1 TTL gate and CL = 100 pF
Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0.45 V to 2.4 V
Timing Measurement Reference Level: 0.8 V and 2 V inputs and outputs
Am27C256
2-41