AM79C989 Datasheet, PDF (1/37 Pages) Advanced Micro Devices – Quad Ethernet Switching Transceiver (QuEST™)

PRELIMINARY
Am79C989
Quad Ethernet Switching Transceiver (QuEST™)
DISTINCTIVE CHARACTERISTICS
s Four independent 10BASE-T transceivers
compliant with the IEEE 802.3 standard
s Four digital Manchester Encode/Decode
(MENDEC) units
s On-chip filtering enables FCC EMI compliance
without external filters or common mode
chokes
s Automatic polarity Correction and Detection on
10BASE-T receivers
s Optional Attachment Unit Interface (AUI) for
non-10BASE-T transceivers
s 10BASE-T Extended Distance option
accommodate lines longer than 100 meters
s Quad AMD Switching Interface (QuASI™)
interface reduces overall pin count
s Half-Duplex and Full-Duplex operation
s Auto-Negotiation compliant with IEEE 802.3u
Standard
s Standard MII management interface and
protocol
s Status Change Interrupt output pin for fast
response time to changed conditions
s 44-pin PLCC CMOS device
s 5 V supply with 3.3 V system interface
compatibility
GENERAL DESCRIPTION
The Am79C989 Quad Ethernet Switching Transceiver
(QuEST™) is a four-port physical layer (PHY) device
that provides all of the analog functions needed for a
10BASE-T switch, including four independent
Manchester Encode/Decode units (MENDECs) and
four independent 10BASE-T transceivers. If the AUI
port is used for a 10BASE-2, 10BASE-5, or
10BASE-FL transceiver, one of the four 10BASE-T
ports is disabled.
The QuEST device is designed for 10 Mbps Ethernet
switching hubs, port switching repeater hubs, routers,
bridges, and servers that require data encoding and
clock recovery on a per port basis and are limited by pin
constraints. Clock recovery is performed as part of the
MENDEC function. The QuEST device supports every
physical layer function of a full-featured switch, includ-
ing full-duplex operation with Auto-Negotiation and the
ability to use various media types.
A unique feature of the QuEST device is the Quad AMD
Switching Interface (QuASI) which multiplexes the data
for all four channels into one set of pins. This minimizes
the pin count and size of the QuEST device and sub-
stantially reduces overall system cost.
The QuEST device provides a 2-pin Media Indepen-
dent Interface (MII) Management Interface which sup-
ports the protocols specified in the IEEE 802.3u
standard. Controlled by the switch system, this inter-
face allows the QuEST device to be polled for status in-
formation and allows operating parameters of the
QuEST device, such as extended distance operation,
to be altered.
The Am79C989 device provides an Interrupt pin to in-
dicate changes in the internal status of the device. The
interrupt function reduces CPU polling of status regis-
ters and allows fast response time to changes in phys-
ical layer conditions.
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 21173 Rev: B Amendment/+2
Issue Date: April 1997