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AM79C972 Datasheet, PDF (1/130 Pages) Advanced Micro Devices – PCnet™-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support | |||
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Am79C972
PCnetâ¢-FAST+
Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
DISTINCTIVE CHARACTERISTICS
n Integrated Fast Ethernet controller for the
Peripheral Component Interconnect (PCI) bus
â 32-bit glueless PCI host interface
â Supports PCI clock frequency from DC to
33 MHz independent of network clock
â Supports network operation with PCI clock
from 15 MHz to 33 MHz
â High performance bus mastering
architecture with integrated Direct Memory
Access (DMA) Buffer Management Unit for
low CPU and bus utilization
â PCI specification revision 2.1 compliant
â Supports PCI Subsystem/Subvendor ID/
Vendor ID programming through the
EEPROM interface
â Supports both PCI 3.3-V and 5.0-V signaling
environments
â Plug and Play compatible
â Supports an unlimited PCI burst length
â Big endian and little endian byte alignments
supported
â Implements optional PCI power management
event (PME) pin
n Media Independent Interface (MII) for
connecting external 10/100 megabit per second
(Mbps) transceivers
â IEEE 802.3-compliant MII
â Intelligent Auto-Poll⢠external PHY status
monitor and interrupt
â Supports both auto-negotiable and non
auto-negotiable external PHYs
â Supports 10BASE-T, 100BASE-TX/FX,
100BASE-T4, and 100BASE-T2 IEEE 802.3-
compliant MII PHYs at full- or half-duplex
n Supports General Purpose Serial Interface
(GPSI) with receive frame tagging support for
internetworking applications
n Full-duplex operation supported in MII and GPSI
ports with independent Transmit (TX) and
Receive (RX) channels
n Supports PC97, PC98, and Net PC requirements
â Implements full OnNow features including
pattern matching and link status wake-up
â Implements Magic Packet mode
â Magic Packet mode and the physical address
loaded from EEPROM at power up without
requiring PCI clock
â Supports PCI Bus Power Management
Interface Specification Version 1.0
â Supports Advanced Configuration and
Power Interface (ACPI) Specification
Version 1.0
â Supports Network Device Class Power
Management Specification Version 1.0
n Large independent internal TX and RX FIFOs
â Programmable FIFO watermarks for both
transmit and receive operations
â Receive frame queuing for high latency PCI
bus host operation
â Programmable allocation of buffer space
between transmit and receive queues
n Dual-speed CSMA/CD (10 Mbps and 100 Mbps)
Media Access Controller (MAC) compliant with
IEEE/ANSI 802.3 and Blue Book Ethernet
standards
n EEPROM interface supports jumperless design
and provides through-chip programming
â Supports full programmability of half-/full-
duplex operation for external 10/100 Mbps
PHYs through EEPROM mapping
â Programmable PHY reset output pin capable
of resetting external PHY without needing
buffering
n Integrated oscillator circuit eliminates need for
external crystal
n Extensive programmable LED status support
n Support for operation in industrial temperature
range (-40°C to +85°C)
Publication# 21485 Rev: D Amendment/0
Issue Date: December 1999
Refer to AMDâs Website (www.amd.com) for the latest information.
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