CS19201 Datasheet, PDF (2/2 Pages) Applied Micro Circuits Corporation – STS-192 SONET/SDH Interleaver/Disinterleaver

INDUS
Product Brief
STS-192 SONET/SDH Interleaver/Disinterleaver
Part Number S19201CAI12, Revision 2.9, March 2003
Overview and Applications
SONET Processing
The S19201 can be used in either SONET or SDH applica-
tions. On the high-speed side, it interfaces to a STS-192/
STM-64 signal in each direction. On the low-speed side, it
interfaces to four STS-48/STM-16 signals in each direction.
The S19201 can be used in conjunction with AMCC’s
RHINE, MISSOURI, or DANUBE chips for terminating
STS-48/STM-16 payloads.
In the multiplex direction, the S19201 accepts four 16-bit
parallel STS-48/STM-16 (155 Mb/s) signals. The S19201
locates the STS-48/STM-16 frames, descrambles the data,
processes the TOH bytes (or SOH bytes in SDH mode),
muxes the four STS-48/STM-16 tributaries.
This muxed signal, or the STS-192 from the demux input is
then selected as the input to the FRGEN192. The S19201
then generates the TOH bytes (or SOH bytes in SDH
mode), performs frame synchronous scrambling, and out-
puts the data onto a 16-bit bus.
In the demultiplex direction, the S19201 accepts a 16-bit
wide STS-192/STM-64 signal. The S19201 locates frame
in this signal, performs descrambling, and processes the
TOH bytes. This signal is then selected for disinterleaving.
The four tributaries are then output on four 16-bit parallel
interfaces.
A TOH/SOH interface provides direct add/drop capability
for both Section and Line overhead.
On the multiplex side the S19201 generates section and
line overhead. It performs framing pattern insertion (A1,
A2), scrambling, alarm signal insertion, and generates sec-
tion and line Bit Interleaved Parity (B1/B2) for far-end per-
formance monitoring.
On the Demux side the S19201 processes section and line
overhead. It performs framing (A1, A2), descrambling,
alarm detection, bit interleaved parity monitoring (B1/B2),
and error count accumulation for performance monitoring.
High-Speed Interface
On the high-speed side, the S19201 supports 16-bit paral-
lel high-speed interfaces, operating at 622 MHz, on both
the multiplex and demultiplex side.
Low-Speed Interface
On the low-speed side, the S19201 supports four 16-bit
parallel high-speed interfaces operating at 155 MHz.
Figure 2: Typical Applications: S19201 in a STS-192/AU-4-64 Channelized System
SONET
Line Side
Interface
OC-192
Line Interface
Microprocessor
Control
Fiber Optic
Transceiver
Reference
Clock
13
Control Addr Data
MX_CLK_OUT
SerTxD±
SerRxD±
P/S
SONET XMIT
&
S/P
SYS_CLK_IN
MX_DATA_OUT[15:0]
DX_LOSEXT
SONET RCVR _{DX_CLK_IN}
with
Clk Recovery
DX_DATA_IN[15:0]
AMCC S19211
AMCC
S19201
16
MX_DATA_IN_[1]_[15:0]
DX_DATA_OUT_[1]_[15:0] ^RHINE/
MISSOURI
MX_DATA_IN_[2]_[15:0]
DX_DATA_OUT_[2]_[15:0]
RHINE/
MISSOURI
MX_DATA_IN_[3]_[15:0]
DX_DATA_OUT_[3]_[15:0] ^RHINE/
MISSOURI
MX_DATA_IN_[4]_[15:0]
DX_DATA_OUT_[4]_[15:0]
RHINE/
MISSOURI
MISSOURI - DCS FABRIC
RHINE - IP ROUTER
Multi
Channel
Link Layer
Device
Switching/
Routing
Logic
TOH Insertion
and Extraction
AMCC reserves the right to make changes to its products, or to discontinue any product or service without notice, and advises its customers to
obtain the latest version of relevant information to verify, before placing orders, that the information being relied upon is current.
AMCC is a registered trademark of Applied Micro Circuits Corporation. Copyright © 2002 Applied Micro Circuits Corporation. All Rights Reserved.
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