S2060 Datasheet, PDF (17/22 Pages) Applied Micro Circuits Corporation – GIGABIT ETHERNET TRANSCEIVER

GIGABIT ETHERNET TRANSCEIVER
Figure 10. Transmitter Timing
TBC
TX[0-9]
SERIAL DATA OUT
T₁ T₂
S2060
Table 8. S2060 Transmitter Timing
Parameters
Description
Min Max Units
Conditions
T
1
T₂
T_SDR, T_SDF
T_J
Data Setup w.r.t. TBC
Data Hold w.r.t. TBC
Serial Data Rise and Fall
Serial Data Output total jitter
(p-p)
1.2
-
0.25 -
-
270
-
192
ns See Note 1.
ns
ps 20% - 80%, tested on sample basis.
Peak-to-peak, measured on sample
ps basis. Measured with ±K28.5 or 2⁷-1
pattern at 1.25 GHz.
T_DJ
Serial Data Output
deterministic jitter (p-p)
Peak-to-peak, tested on a sample
-
80 ps basis. Measured with ±K28.5 pattern
at 1.25 GHz.
1. All AC measurements are made from the reference voltage level of the clock (+1.4 V) to the valid input or output data
levels (+.8 V or +2.0 V).
Figure 11. Receiver Timing Full Rate Mode (RATEN Active)
SERIAL DATA IN
RBC0
RBC1
RX[9-0]
comma
T₃ T₄
SKEW
T₃ T₄
March 7, 2001 / Revision H
17