EP53F8QI Datasheet, PDF (8/12 Pages) Enpirion, Inc. – 1500 mA Synchronous Buck PWM DC-DC Converter with Integrated Inductor

Soft Start
The EP53F8QI has an internal soft-start circuit
that controls the ramp of the output voltage.
The control circuitry limits the V_OUT ramp rate to
levels that are safe for the Power MOSFETS
and the integrated inductor.
The device has a constant VOUT ramp time.
Therefore, the ramp rate will vary with the
output voltage setting. Output voltage ramp
time is given in the Electrical Characteristics
Table.
Excess bulk capacitance on the output of the
device can cause an over-current condition at
startup. The maximum total capacitance on
the output, including the output filter capacitor
and bulk and decoupling capacitance, at the
load, is given as:
C_{OUT_TOTAL_MAX} = 1.867x10^-3/V_OUT Farads
The nominal value for C_OUT is 22uF.
The above number and formula assume a no
load condition at startup.
Over Current/Short Circuit Protection
When an over current condition occurs, V_OUT is
pulled low. This condition is maintained for a
period of 1.2 ms and then a normal soft start
cycle is initiated. If the over current condition
still persists, this cycle will repeat.
Under Voltage Lockout
An under voltage lockout circuit will hold off
switching during initial power up until the input
voltage reaches sufficient level to ensure
proper operation. If the voltage drops below the
UVLO threshold the lockout circuitry will again
disable switching. Hysteresis is included to
prevent chattering between UVLO high and low
states.
Enable
The ENABLE pin provides means to shut down
the converter or initiate normal operation. A
logic high will enable the converter to go
through the soft start cycle and regulate the
EP53F8QI
output voltage to the desired value. A logic low
will allow the device to discharge the output
and go into shutdown mode for minimal power
consumption. When the output is discharged,
an auxiliary NFET turns on and limits the
discharge current to 300 mA or below. The
ENABLE pin must not be left floating.
Thermal Shutdown
When excessive power is dissipated in the
device, its junction temperature rises. Once the
junction temperature exceeds the thermal
shutdown temperature, the thermal shutdown
circuit turns off the converter, allowing the
device to cool. When the junction temperature
decreases to a safe operating level, the device
will be re-enabled and go through a normal
startup process. The specific thermal
shutdown junction temperature and hysteresis
can be found in the thermal characteristics
table
Power OK
The EP53F8QI provides an open drain output
to indicate if the output voltage stays within
92% to 111% of the set value. Within this
range, the POK output is allowed to be pulled
high. Outside this range, POK remains low.
However, during transitions such as power up,
power down, and dynamic voltage scaling, the
POK output will not change state until the
transition is complete for enhanced noise
immunity.
The POK has 5 mA sink capability for events
where it needs to feed a digital controller with
standard CMOS inputs. When POK is pulled
high, the pin leakage current is as low as 500
nA maximum over temperature. This allows a
large pull up resistor such as 100 kΩ to be
used for minimal current consumption in
shutdown mode.
The POK output can also be conveniently used
as an ENABLE input of the next stage for
power sequencing of multiple converters.
01542
October 11, 2013
www.altera.com/enpirion Page 8
Rev F