ED8106 Datasheet, PDF (8/14 Pages) Altera Corporation – Single-Rail PWM controller

Functional Description
Overview
The ED8106 is true-digital single-phase PWM
controller optimally configured for use with the
Altera Power Solutions 40A Power Train ET4040.
The ED8106 has a digital power control loop
incorporating output voltage sensing, average
inductor current sensing, and extensive fault
monitoring and handling features. Several different
functional units are integrated in the device. A
dedicated digital control loop is used to provide fast
loop response and optimal output voltage
regulation. This includes output voltage sensing,
average inductor current sensing, a digital control
law, and a digital pulse-width modulator (DPWM).
In parallel, a dedicated error handler allows fast
and flexible detection of error signals and their
appropriate handling. A housekeeping analog-to-
digital converter (HKADC) ensures the reliable and
efficient measurement of environmental signals,
such as input voltage and temperature.
An application-specific, low-energy integrated
microcontroller is used to control the overall
system. It manages configuration of the various
logic units according to the preprogrammed
configuration look-up tables and the external
configuration resistors connected to the CONFIG0
and CONFIG1 pins. These pin-strapping resistors
expedite configuration of output voltage,
compensation, and rise time without requiring
digital communication. Altera’s ED81xx Power
Designer graphical user interface (GUI) allows the
user to monitor the controller’s measurements of
the environmental signals and the status of the
error handler via the GPIO2 and GPIO3 pins.
A high-reliability, high-temperature one-time
programmable memory (OTP) is used to store
configuration parameters. All required bias and
reference voltages are internally derived from the
external supply voltage.
Power Supply Circuitry, Reference
Decoupling, and Grounding
The ED8106 incorporates several internal power
regulators in order to derive all required supply and
bias voltages from a single external supply voltage.
This supply voltage can be either 5V or 3.3V
depending on whether the internal 3.3V regulator
should be used. If the internal 3.3V regulator is not
used, 3.3V must be supplied to the 3.3V and 5V
supply pins. Decoupling capacitors are required at
ED8106
the VDD33, VDD18, and AVDD18 pins (1.0µF
minimum; 4.7µF recommended). If the 5.0V supply
voltage is used, i.e., the internal 3.3V regulator is
used, a small load current can be drawn from the
VDD33 pin. This can be used to supply pull-up
resistors, for example.
The reference voltages required for the analog-to-
digital converters are generated within the ED8106.
External decoupling must be provided between the
VREFP and ADCVREF pins. Therefore, a 4.7µF
capacitor is required at the VREFP pin, and a
100nF capacitor is required at the ADCVREF pin.
The two pins should be connected with
approximately 50Ω resistance in order to provide
sufficient decoupling between the pins.
Three different ground connections (the pad, AGND
pin, and GND pin) are available on the outside of
the package. These should be connected together
to a single ground tie. A differentiation between
analog and digital ground is not required.
Reset/Start-up Behavior
The ED8106 employs an internal power-on-reset
(POR) circuit to ensure proper start up and shut
down with a changing supply voltage. Once the
supply voltage increases above the POR threshold
voltage (see section 0), the ED8106 begins the
internal start-up process. Upon its completion, the
device is ready for operation.
Digital Power Control
Overview
The digital power control loop consists of the
integral parts required for the control functionality of
the ED8106. A high-speed analog front-end is used
to digitize the output voltage. A digital control core
uses the acquired information to provide duty-cycle
information to the PWM that controls the drive
signals to the power stage.
Switching Frequency
The ED8106 supports the switching frequencies
listed in Table 1.
Table1: Supported Switching Frequencies
1000 kHz
888 kHz
800 kHz
666.6 kHz
571.4 kHz
500.0 kHz
09354
April 24, 2014
www.altera.com/enpirion, Page 8
Rev C