PF48F4400P0VBQEK Datasheet, PDF (71/95 Pages) Micron Technology – 256Mb and 512Mb (256Mb/256Mb), P30-65nm

256Mb and 512Mb (256Mb/256Mb), P30-65nm
Flowcharts
Figure 22: Erase Suspend/Resume Procedure
Start
Read Status
Write 70h
Any Address
Erase Suspend
Write B0h
Any Address
Read Status Register
Toggle CE#/OE# to
update the
status register
Address = X
SR.7 =
1 = Ready
0
0 = Busy
1
SR.6 =
1 = Suspended
0
0 = Completed
Erase
Completed
1
Read _{Read/Program?}
(FFh/40h)
Read Array Data from
a block other than the
one being erased
No
Program
Program Loop: to a
block other than the
one being erased
Done?
Yes
Erase Resume
Write D0h
Any Address
Read Array
Write FFh
Erase ¹
Resumed
Read Status
Write 70h
Any Address
Read Array
Data
Note: 1. The ^tERS/SUSP timing between the initial block erase or erase resume command and a
subsequent erase suspend command should be followed.
PDF: 09005aef84566799
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN
71
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