EPM3128ATC100-10N Datasheet, PDF (6/46 Pages) Altera Corporation – Programmable Logic Device Family

MAX 3000A Programmable Logic Device Family Data Sheet
Macrocells
MAX 3000A macrocells can be individually configured for either
sequential or combinatorial logic operation. Macrocells consist of three
functional blocks: logic array, product–term select matrix, and
programmable register. Figure 2 shows a MAX 3000A macrocell.
Figure 2. MAX 3000A Macrocell
LAB Local Array
36 Signals
from PIA
16 Expander
Product Terms
Parallel Logic
Expanders
(from other
macrocells)
Global Global
Clear Clocks
2
Product-
Term
Select
Matrix
Clock/
Enable
Select
VCC
Clear
Select
Programmable
Register
Register
Bypass
PRN
D/T Q
ENA
CLRN
To I/O
Control
Block
Shared Logic
Expanders
To PIA
Combinatorial logic is implemented in the logic array, which provides
five product terms per macrocell. The product–term select matrix
allocates these product terms for use as either primary logic inputs (to the
OR and XOR gates) to implement combinatorial functions, or as secondary
inputs to the macrocell’s register preset, clock, and clock enable control
functions.
Two kinds of expander product terms (“expanders”) are available to
supplement macrocell logic resources:
■ Shareable expanders, which are inverted product terms that are fed
back into the logic array
■ Parallel expanders, which are product terms borrowed from adjacent
macrocells
The Altera development system automatically optimizes product–term
allocation according to the logic requirements of the design.
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Altera Corporation