5CEBA7F23C7N Datasheet, PDF (43/74 Pages) Altera Corporation – Cyclone V Device Handbook

Chapter 2: Device Datasheet for Cyclone V Devices
Electrical Characteristics
2–13
Table 2–18. Differential HSTL I/O Standards for Cyclone V Devices—Preliminary
I/O
Standard
HSTL-18
Class I, II
HSTL-15
Class I, II
HSTL-12
Class I, II
HSUL-12
V_CCIO (V)
Min Typ Max
V_DIF(DC) (V)
Min Max
1.71 1.8 1.89 0.2 —
1.425 1.5 1.575 0.2 —
1.14
1.2
1.26
0.16
V_CCIO
+ 0.3
1.14 1.2 1.3 0.26 0.26
V_X(AC) (V)
Min
Typ
0.78
—
0.68
—
—
0.5 x
V_CCIO
0.5 x V_CCIO 0.5 x
– 0.12 V_CCIO
Max
1.12
0.9
—
0.5 x
V_CCIO
+0.12
V_CM(DC) (V)
Min Typ Max
0.78 — 1.12
0.68 — 0.9
0.4 x V 0.5 x
CCIO
V_CCIO
0.4 x V 0.5 x
CCIO
V_CCIO
0.6 x
V_CCIO
0.6 x
V_CCIO
V_DIF(AC) (V)
Min Max
0.4 —
0.4 —
0.3
V_CCIO
+ 0.48
0.44 0.44
Table 2–19. Differential I/O Standard Specifications for Cyclone V Devices—Preliminary ⁽¹⁾
I/O Standard
V_CCIO (V)
Min Typ Max Min
V_ID (mV)
Condition
V_ICM(DC) (V)
Max Min Max
V_OD (V) ⁽²⁾
Min Typ Max
V_OCM (V) ⁽²⁾
Min Typ Max
PCML
Transmitter, receiver, and input reference clock pins of high-speed transceivers use the PCML I/O standard.
For transmitter, receiver, and reference clock I/O pin specifications, refer to Table 2–20 on page 2–14.
2.5 V LVDS
RSDS (HIO)
Mini-LVDS
(HIO)
2.375 2.5 2.625 100 V_CM = 1.25 V — 0.05 1.8 0.247 — 0.6 1.125 1.25 1.375
2.375 2.5 2.625 100 V_CM = 1.25 V — 0.3 1.4 0.1 0.2 0.6 0.5 1.2 1.4
2.375 2.5 2.625 200
—
600 0.4 1.325 0.25 — 0.6 1 1.2 1.4
LVPECL
2.375 2.5 2.625 300
—
— 0.6 1.8 — — — — — —
SLVS
2.375 2.5 2.625 100 V_CM = 1.25 V — 0.05 1.8 — — — — — —
Notes to Table 2–19:
(1) The 1.4-V and 1.5-V PCML transceiver I/O standard specifications are described in “Transceiver Performance Specifications” on page 2–14.
(2) RL range: 90 ≤ RL ≤ 110 Ω
Power Consumption
Altera offers two ways to estimate power consumption for a design—the Excel-based
Early Power Estimator (EPE) and the Quartus^® II PowerPlay Power Analyzer feature.
1 You typically use the interactive Excel-based EPE before designing the FPGA to get a
magnitude estimate of the device power. The Quartus II PowerPlay Power Analyzer
provides better quality estimates based on the specifics of the design after you
complete place-and-route. The PowerPlay Power Analyzer can apply a combination
of user-entered, simulation-derived, and estimated signal activities that, when
combined with detailed circuit models, yields very accurate power estimates.
f For more information about power estimation tools, refer to the PowerPlay Early Power
Estimator User Guide and the PowerPlay Power Analysis chapter in the Quartus II
Handbook.
February 2012 Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet