EPM3064ATC44-10N Datasheet, PDF (38/46 Pages) Altera Corporation – Programmable Logic Device Family

MAX 3000A Programmable Logic Device Family Data Sheet
Table 25. EPM3512A Internal Timing Parameters (Part 2 of 2) Note (1)
Symbol
Parameter
Conditions
Speed Grade
Unit
-7
-10
Min Max Min Max
t_OD3
t_ZX1
t_ZX2
t_ZX3
t_XZ
t_SU
t_H
t_FSU
t_FH
t_RD
t_COMB
t_IC
t_EN
t_GLOB
t_PRE
t_CLR
t_PIA
t_LPA
Output buffer and pad delay,
slow slew rate = on
V_CCIO = 2.5 V or 3.3 V
Output buffer enable delay,
slow slew rate = off
V_CCIO = 3.3 V
Output buffer enable delay,
slow slew rate = off
V_CCIO = 2.5 V
Output buffer enable delay,
slow slew rate = on
V_CCIO = 3.3 V
Output buffer disable delay
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 5 pF
Register setup time
Register hold time
Register setup time of fast input
Register hold time of fast input
Register delay
Combinatorial delay
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
(2)
Low-power adder
(5)
6.0
6.5
ns
4.0
5.0
ns
4.5
5.5
ns
9.0
10.0
ns
4.0
5.0
ns
2.1
3.0
ns
0.6
0.8
ns
1.6
1.6
ns
1.4
1.4
ns
1.3
1.7
ns
0.6
0.8
ns
1.8
2.3
ns
1.0
1.3
ns
1.7
2.2
ns
1.0
1.4
ns
1.0
1.4
ns
3.0
4.0
ns
4.5
5.0
ns
Notes to tables:
(1) These values are specified under the recommended operating conditions, as shown in Table 13 on page 23. See
Figure 11 on page 27 for more information on switching waveforms.
(2) These values are specified for a PIA fan–out of one LAB (16 macrocells). For each additional LAB fan–out in these
devices, add an additional 0.1 ns to the PIA timing value.
(3) This minimum pulse width for preset and clear applies for both global clear and array controls. The t_LPA parameter
must be added to this minimum width if the clear or reset signal incorporates the t_LAD parameter into the signal
path.
(4) These parameters are measured with a 16–bit loadable, enabled, up/down counter programmed into each LAB.
(5) The t_LPA parameter must be added to the t_LAD, t_LAC, t_IC, t_EN, t_SEXP, t_ACL, and t_CPPW parameters for macrocells
running in low–power mode.
38
Altera Corporation