EPLD Datasheet, PDF (38/42 Pages) Altera Corporation – The Altera Classic device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology

Classic EPLD Family Data Sheet
Table 26. EP1810 Device Capacitance Note (9)
Symbol
Parameter
C_IN
C_IO
C_CLK1
C_CLK2
Input pin capacitance
I/O pin capacitance
C_CLK1 pin capacitance
C_CLK2 pin capacitance
Conditions
V_IN = 0 V, f = 1.0 MHz
V_OUT = 0 V, f = 1.0 MHz
V_IN = 0 V, f = 1.0 MHz
V_IN = 0 V, f = 1.0 MHz
Min Max Unit
20
pF
20
pF
25
pF
160
pF
Table 27. EP1810 Device I_CC Supply Current Notes (2), (6), (7)
Symbol
Parameter
Conditions
Speed Min
Grade
I_CC1
V_CC supply current
(non-Turbo, standby)
V_I = V_CC or ground, no load, -20, -25
(10)
-35, -45
I_CC2
V_CC supply current
(non-Turbo, active)
V_I = V_CC or ground, no load, -20, -25
f = 1.0 MHz (10)
-35, -45
I_CC3
V_CC supply current (Turbo, active) V_I = V_CC or ground, no load -20, -25
f = 1.0 MHz (10)
-35, -45
Typ Max Unit
50
150
µA
35
150
µA
20
40
mA
10
30 (40) mA
180 225 (250) mA
100 180 (240) mA
Notes to tables:
(1) See the Operating Requirements for Altera Devices Data Sheet in this data book.
(2) Numbers in parentheses are for industrial-temperature-range devices.
(3) The minimum DC input is –0.3 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 7.0 V for
input currents less than 100 mA and periods less than 20 ns.
(4) Maximum V_CC rise time is 50 ms.
(5) For EP1810 clocks: t_R and t_F = 100 ns (50 ns for industrial-temperature-range versions).
(6) Typical values are for T_A = 25° C and V_CC = 5 V.
(7) These values are specified in Table 24 on page 781.
(8) The I_OH parameter refers to high-level TTL or CMOS output current; the I_OL parameter refers to low-level TTL
output current.
(9) The device capacitance is measured at 25° C and is sample-tested only.
(10) Measured with a device programmed as four 12-bit counters.
782
Altera Corporation