EPF81500AQC240-2 Datasheet, PDF (25/62 Pages) Altera Corporation – Programmable Logic Device Family

FLEX 8000 Programmable Logic Device Family Data Sheet
The instruction register length for FLEX 8000 devices is three bits. Table 7
shows the boundary-scan register length for FLEX 8000 devices.
Table 7. FLEX 8000 Boundary-Scan Register Length
Device
EPF8282A, EPF8282AV
EPF8636A
EPF8820A
EPF81500A
Boundary-Scan Register Length
273
417
465
645
FLEX 8000 devices that support JTAG include weak pull-ups on the JTAG
pins. Figure 14 shows the timing requirements for the JTAG signals.
Figure 14. EPF8282A, EPF8282AV, EPF8636A, EPF8820A & EPF81500A
JTAG Waveforms
TMS
3
TDI
TCK
t_JCH
t_JCP
t_JCL
t_JPSU
t_JPH
TDO
Signal
to Be
Captured
Signal
to Be
Driven
t_JPZX
t_JSSU
t_JPCO
t_JSH
t_JSZX
t_JSCO
t_JPXZ
t_JSXZ
Table 8 shows the timing parameters and values for EPF8282A,
EPF8282AV, EPF8636A, EPF8820A, and EPF81500A devices.
Altera Corporation
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