EP3C5F256C8 Datasheet, PDF (20/34 Pages) Altera Corporation – 1. Cyclone III Device Datasheet

1–20
Chapter 1: Cyclone III Device Datasheet
Switching Characteristics
Table 1–28. Cyclone III Devices Mini-LVDS Transmitter Timing Specifications ^{(1), (2)} (Part 2 of 2)
Symbol
Modes
C6
C7, I7
C8, A7
Unit
Min Typ Max Min Typ Max Min Typ Max
Output jitter
(peak to
—
peak)
—
— 500 — — 500 —
— 550
ps
20 – 80%,
t_RISE
C_LOAD = 5 pF
— 500 —
— 500 —
— 500 —
ps
t_FALL
t_LOCK ⁽³⁾
20 – 80%,
C_LOAD = 5 pF
—
— 500 —
— 500 —
— 500 —
ps
— —1
——1
—
—
1
ms
Notes to Table 1–28:
(1) Applicable for true and emulated mini-LVDS transmitter.
(2) True mini-LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated mini-LVDS transmitter is supported
at the output pin of all I/O banks.
(3) t_LOCK is the time required for the PLL to lock from the end of device configuration.
Cyclone III Device Handbook
Volume 2
July 2012 Altera Corporation