|
EP4CE6E22I7N Datasheet, PDF (2/14 Pages) Altera Corporation – Cyclone IV FPGA Device Family Overview | |||
|
◁ |
1â2
Chapter 1: Cyclone IV FPGA Device Family Overview
Cyclone IV Device Family Features
â Cyclone IV GX devices offer up to eight high-speed transceivers that provide:
â Data rates up to 3.125 Gbps
â 8B/10B encoder/decoder
â 8-bit or 10-bit physical media attachment (PMA) to physical coding sublayer
(PCS) interface
â Byte serializer/deserializer (SERDES)
â Word aligner
â Rate matching FIFO
â TX bit slipper for Common Public Radio Interface (CPRI)
â Electrical idle
â Dynamic channel reconfiguration allowing you to change data rates and
protocols on-the-fly
â Static equalization and pre-emphasis for superior signal integrity
â 150 mW per channel power consumption
â Flexible clocking structure to support multiple protocols in a single transceiver
block
â Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe)
Gen 1:
â Ã1, Ã2, and Ã4 lane configurations
â End-point and root-port configurations
â Up to 256-byte payload
â One virtual channel
â 2 KB retry buffer
â 4 KB receiver (Rx) buffer
â Cyclone IV GX devices offer a wide range of protocol support:
â PCIe (PIPE) Gen 1 Ã1, Ã2, and Ã4 (2.5 Gbps)
â Gigabit Ethernet (1.25 Gbps)
â CPRI (up to 3.072 Gbps)
â XAUI (3.125 Gbps)
â Triple rate serial digital interface (SDI) (up to 2.97 Gbps)
â Serial RapidIO (3.125 Gbps)
â Basic mode (up to 3.125 Gbps)
â V-by-One (up to 3.0 Gbps)
â DisplayPort (2.7 Gbps)
â Serial Advanced Technology Attachment (SATA) (up to 3.0 Gbps)
â OBSAI (up to 3.072 Gbps)
Cyclone IV Device Handbook,
Volume 1
February 2013 Altera Corporation
|
▷ |