5CSXFC6D Datasheet, PDF (12/35 Pages) Altera Corporation – Key Advantages of Cyclone V Devices

12
Package Plan
Related Information
I/O Features in Cyclone V Devices
Provides the number of LVDS channels in each device package.
CV-51001
2013.12.26
Package Plan
Table 11: Package Plan for Cyclone V SE Devices
The HPS I/O counts are the number of I/Os in the HPS and does not correlate with the number of HPS-specific I/O
pins in the FPGA. Each HPS-specific pin in the FPGA may be mapped to several HPS I/Os.
U484
U672
F896
Member Code
(19 mm)
(23 mm)
(31 mm)
FPGA GPIO HPS I/O FPGA GPIO HPS I/O FPGA GPIO
HPS I/O
A2
66
151
145
181
—
—
A4
66
151
145
181
—
—
A5
66
151
145
181
288
181
A6
66
151
145
181
288
181
Cyclone V SX
This section provides the available options, maximum resource counts, and package plan for the Cyclone V SX
devices.
The information in this section is correct at the time of publication. For the latest information and to get
more details, refer to the Altera Product Selector.
Related Information
Altera Product Selector
Provides the latest information about Altera products.
Available Options
The following figure shows sample ordering code and lists the options available for Cyclone V SX devices.
Altera Corporation
Cyclone V Device Overview
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