ASM2P3805X Datasheet, PDF (6/12 Pages) Alliance Semiconductor Corporation – 3.3V CMOS Dual 1-To-5 Clock Driver

June 2005
rev 0.2
Test Circuits and Waveforms
ASM2P3805X
Switch Position
Test
Disable Low
Enable Low
Disable High
Enable High
Switch
6V
GND
Test Conditions
Symbol
C_L
R_T
R_L
t_R / t_F
V_CC = 3.3V ±0.3V
15
Z_OUT of pulse generator
33
1 (0V to 3V or 3V to 0V)
Unit
pF
Ω
Ω
nS
Definitions:
C_L = Load capacitance: includes jig and probe capacitance.
R_T = Termination resistance: should be equal to Z_OUT of the Pulse
Generator.
t_R / t_F = Rise/Fall time of the input stimulus from the Pulse Generator.
3.3V CMOS Dual 1-To-5 Clock Driver
Notice: The information in this document is subject to change without notice.
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