ASM5I9352 Datasheet, PDF (5/12 Pages) Alliance Semiconductor Corporation – 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer

July 2005
ASM5I9352
rev 0.2
DC Electrical Specifications (V_DD = 2.5V ± 5%, T_A = -40°C to +85°C)
Parameter
Description
Condition
Min
Typ
Max Unit
VIL
Input Voltage, Low
LVCMOS
0.7
V
VIH
Input Voltage, High
VOL
Output Voltage, Low¹
VOH
Output Voltage, High¹
LVCMOS
IOL= 15 mA
IOH= –15 mA
1.7
VDD+ 0.3
V
0.6
V
1.8
V
IIL
Input Current, Low
IIH
Input Current, High²
VIL= VSS
VIL= VDD
–10
µA
100
µA
IDDA
PLL Supply Current
AVDD only
5
10
mA
IDDQ
Quiescent Supply Current
All VDD pins except AVDD
3
5
mA
IDD
Dynamic Supply Current
170
mA
CIN
Input Pin Capacitance
4
pF
ZOUT
Output Impedance
17 – 20
Ω
Note:1.Driving one 50Ω parallel terminated transmission line to a termination voltage of V_TT. Alternatively, each output drives up to two 50 Ω series terminated
transmission lines.
2.Inputs have pull-down resistors that affect the input current.
DC Electrical Specifications (V_DD = 3.3V ± 5%, T_A = -40°C to +85°C)
Parameter
Description
Condition
Min
Typ
Max Unit
VIL
Input Voltage, Low
LVCMOS
0.8
V
VIH
Input Voltage, High
LVCMOS
2.0
VDD + 0.3
V
VOL
Output Voltage, Low¹
IOL= 24 mA
IOL= 12 mA
0.55
V
0.30
VOH
Output Voltage, High¹
IOH= –24 mA
2.4
V
IIL
Input Current, Low
IIH
Input Current, High²
VIL= VSS
VIL= VDD
–10
µA
100
µA
IDDA
PLL Supply Current
AVDD only
5
10
mA
IDDQ
Quiescent Supply Current
All VDD pins except AVDD
3
5
mA
IDD
Dynamic Supply Current
240
mA
CIN
Input Pin Capacitance
4
pF
ZOUT
Output Impedance
14 – 17
Ω
Note:1.Driving one 50Ω parallel terminated transmission line to a termination voltage of V_TT. Alternatively, each output drives up to two 50 Ω series terminated
transmission lines.
2.Inputs have pull-down resistors that affect the input current.
2.5V or 3.3V, 200 MHz, 11-Output Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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