AS4C32M16D2A-25BIN Datasheet, PDF (49/61 Pages) Alliance Semiconductor Corporation – Fully synchronous operation

AS4C32M16D2A-25BIN
Figure 30.3. Burst read operation followed by precharge:
(RL=5, AL=2, CL=3, BL=4, t_RTPÙ2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK#
CK
CMD Post CAS#
READ A
NOP
NOP
NOP
DQS
DQS#
AL + BL/2 clks
AL = 2
CL = 3
RL= 5
DQ's
>=t_RAS
>=t_RTP
Precharge A
NOP
NOP
Bank A
Activate
>=t_RP
CL = 3
DOUT DOUT DOUT DOUT
A0
A1
A2
A3
NOP
Figure 30.4. Burst read operation followed by precharge:
(RL=6, AL=2, CL=4, BL=4, t_RTPÙ2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK#
CK
CMD
Post CAS#
READ A
NOP
DQS
AL + BL/2 clks
DQS#
AL = 2
NOP
NOP
CL = 4
RL= 6
DQ's
>=t_RAS
>=t_RTP
Precharge A
NOP
>=t_RP
CL = 4
NOP
Bank A
Activate
NOP
DOUT DOUT DOUT DOUT
A0
A1
A2
A3
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Rev.1.2
49
Jun./2014