4MX16-DDR1-AS4C4M16D1A Datasheet, PDF (29/54 Pages) Alliance Semiconductor Corporation – Internal pipeline architecture

 
4Mx16 DDR1-AS4C4M16D1A
^F  ^{igure 18. Write Burst Nom, Min, and Max tDQSS}
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11
CK
CK
COMMAND
WRITE
NOP
NOP
NOP
NOP
NOP
ADDRESS
DQS
DQ
DM
Bank ,
Col n
tDQSS (nom)
DI
n
DQS
DQ
DM
tDQSS (min)
DI
n
DQS
tDQSS (max)
DQ
DI
n
DM
DI n = Data In for column n
3 subsequent elements of Data are applied in the programmed order following DI n
A non-interrupted burst of 4 is shown
A10 is LOW with the WRITE command (AUTO PRECHARGE disabled)
DM=UDM & LDM
Don’t Care
Confidential
- 29/54 -
Rev.1.1 July 2015