L2042A Datasheet, PDF (1/10 Pages) Alliance Semiconductor Corporation – 2.5V LCD Panel Reduction IC

October 2003
L2042A
rev 1.0
2.5V LCD Panel Reduction IC
Features
§ FCC approved method of EMI attenuation.
§ Provides up to 15dB of EMI suppression.
§ Generates a low EMI spread spectrum clock of the
input frequency.
§ Input frequency range: 30MHz to 75 MHz.
§ Optimized for 32.5MHz, 54MHz, and 65MHz.
§ Internal loop filter minimizes external components
and board space.
§ Selectable spread deviation.
§ SSON# control pin for spread spectrum enable
and disable options.
§ Low cycle-to-cycle jitter.
§ 2.5V or 3.3V operating voltage range.
§ TTL or CMOS compatible outputs.
§ Ultra-low power CMOS design.
§ Supports most mobile graphic accelerator and
LCD timing controller specifications.
§ Available in 8-pin SOIC and TSSOP.
Product Description
The L2042A is a versatile spread spectrum frequency
modulator designed specifically for digital falt panel
applications. The L2042A reduces electromagnetic
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream clock and data
dependent signals. The L2042A allows significant system
cost savings by reducing the number of circuit board
layers ferrite beads, shielding and other passive
components that are traditionally required to pass EMI
regulations.
The L2042A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The L2042A modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The L2042A is targeted towards digital flat panel
applications for Notebook PCs, Palm -size PCs, office
automation equipment, and LCD monitors.
Block Diagram
SR0 CP1 CP0 SSON#
VDD
DIV2
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
MODOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: [phone] • Fax: [phone] • www.alsc.com