ASMP5P23S04A Datasheet, PDF (1/13 Pages) Alliance Semiconductor Corporation – 3.3 V SpreadTrak Zero Delay Buffer

August 2004
ASMP5P23S04A
rev 2.0
3.3 V ‘SpreadTrak’ Zero Delay Buffer
Features
 Zero input - output propagation delay,
adjustable by capacitive load on FBK input.
 Multiple configurations - Refer “ASM5P23S04A
Configurations Table”.
 Input frequency range: 10MHz to 133MHz
 Multiple low-skew outputs.
 Output-output skew less than 200 ps.
 Device-device skew less than 500 ps.
 Two banks of four outputs.
 Less than 200 ps cycle-to-cycle jitter
 Available in space saving, 8-pin 150-mil SOIC
packages.
 3.3V operation.
 Advanced 0.35µ CMOS technology.
 Industrial temperature available.
 ‘SpreadTrak’
Functional Description
ASM5P23S04A is a versatile, 3.3V zero-delay buffer
designed to distribute high-speed clocks in PC,
workstation, datacom, telecom and other high-performance
applications. It is available in a 8-pin package. The part has
an on-chip PLL which locks to an input clock presented on
the REF pin. The PLL feedback is required to be driven to
FBK pin, and can be obtained from one of the outputs. The
input-to-output propagation delay is guaranteed to be less
than 250ps, and the output-to-output skew is guaranteed to
be less than 200ps.
The ASM5P23S04A has two banks of two outputs each.
Multiple ASM5P23S04A devices can accept the same input
clock and distribute it. In this case the skew between the
outputs of the two devices is guaranteed to be less than
500ps.
The ASM5P23S04A is available in two different
configurations (Refer “ASM5P23S04A Configurations
Table). The ASM5P23S04A-1 is the base part, where the
output frequencies equal the reference if there is no
counter in the feedback path. The ASM5P23S04A-1H is
the high-drive version of the -1 and the rise and fall times
on this device are much faster.
The ASM5P23S04A-2 allows the user to obtain Ref, 1/2 X
and 2X frequencies on each output bank. The exact
configuration and output frequencies depend on which
output drives the feedback pin. The ASM5P23S04A-5H is a
high-drive version with REF/2 on both banks
Block Diagram
REF
FBK
CLKA1
PLL
CLKA2
/2
Extra Divider (-2)
CLKB1
CLKB2
Alliance Semiconductor
2575, Augustine Drive  Santa Clara, CA  Tel: [phone]  Fax: [phone]  www.alsc.com
Notice: The information in this document is subject to change without notice.