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ASM3P2182A Datasheet, PDF (1/7 Pages) Alliance Semiconductor Corporation – LCD Panel EMI Reduction IC
November 2003
ASM3P2182A
rev 1.1
Features
LCD Panel EMI Reduction IC
ƒ FCC approved method of EMI attenuation.
ƒ Provides up to 15dB EMI reduction.
ƒ Generates a 1X low EMI spread spectrum clock of
the input frequency.
ƒ Input frequency range: 25MHz to 210 MHz.
ƒ Internal loop filter minimizes external components
and board space.
ƒ Center spread.
ƒ 4 spread frequency deviation selections: ± 0.13%
The ASM3P2182A reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of down stream clock and data dependent
signals. The ASM3P2182A allows significant system cost
savings by reducing the number of circuit board layers
ferrite beads, shielding and other passive components
that are traditionally required to pass EMI regulations.
to ± 1.24%.
ƒ Low inherent cycle-to-cycle jitter.
ƒ 3.3V operating voltage range.
ƒ TTL or CMOS compatible inputs and outputs.
The ASM3P2182A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
ƒ Low power CMOS design.
ƒ Supports notebook VGA and other LCD timing
controller applications.
ƒ Products are available for industrial temperature
range.
ƒ Available in 8-pin SOIC and TSSOP.
The ASM3P2182A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
Product Description
The ASM3P2182A is a versatile spread spectrum
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
frequency modulator designed specifically for a wide
range of input clock frequencies from 25MHz to 210MHz.
Applications
(Refer Input Frequency and Modulation Rate Table). The
ASM3P2182A can generate an EMI reduced clock from
an OSC or a system generated clock. The ASM3P2182A
offers a Center Spread clock and with a percentage
deviation from ± 0.13% or ± 1.24%.
The ASM3P2182A is targeted towards EMI management
for memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as PC
peripheral devices, consumer electronics, and embedded
controller systems.
Block Diagram
FS0 FS1
S0, S1
VDD
XIN
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
MODOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.