ASM2I2310ANZ Datasheet, PDF (1/12 Pages) Alliance Semiconductor Corporation – 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs

June 2005
rev 0.4
ASM2I2310ANZ
3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
Features
ƒ One input to 10 output buffer/driver
ƒ Supports up to four SDRAM SO-DIMMs
ƒ Two additional outputs for feedback
ƒ Serial interface for output control
ƒ Low skew outputs
ƒ Up to 133MHz operation
ƒ Multiple V_DD and V_SS pins for noise reduction
ƒ Dedicated OE pin for testing
ƒ Space-saving 28 Pin SSOP package
ƒ 3.3V operation
Functional Description
The ASM2I2310ANZ is a 3.3V buffer designed to distribute
high-speed clocks in mobile PC applications. The part has
10 outputs, 8 of which can be used to drive up to four
SDRAM SO-DIMMs, and the remaining can be used for
external feedback to a PLL. The device operates at 3.3V
and outputs can run up to 133MHz, thus making it
compatible with Pentium II^®i processors.
The ASM2I2310ANZ also includes a serial interface (IIC),
which can enable or disable each output clock. The IIC is
Slave Receiver only and is Standard mode compliant. IIC
Master can write into the IIC registers but cannot read
back. The first two bytes after address should be ignored
by IIC Block and data is valid after these two bytes as given
in IIC Byte Flow Table. On power-up, all output clocks are
enabled. A separate Output Enable pin facilitates testing on
ATE.
Block Diagram
BUF_IN
SDATA
SCLOCK
OE
i _{Pentium II is a registered trademark of Intel Corporation}
Serial Interface
Decoding
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: [phone] • Fax: [phone] • www.alsc.com
Notice: The information in this document is subject to change without notice.