AS4C4M4F0 Datasheet, PDF (1/18 Pages) Alliance Semiconductor Corporation – 5V 4M×4 CMOS DRAM (Fast Page mode)

®
5V 4M×4 CMOS DRAM (Fast Page mode)
AS4C4M4F0
AS4C4M4F1
Features
• Organization: 4,194,304 words × 4 bits
• High speed
- 50/60 ns RAS access time
- 25/30 ns column address access time
- 12/15 ns CAS access time
• Low power consumption
- Active: 908 mW max
- Standby: 5.5 mW max, CMOS I/O
• Fast page mode
• Refresh
- 4096 refresh cycles, 64 ms refresh interval for
AS4C4M4F0
- 2048 refresh cycles, 32 ms refresh interval for
AS4C4M4F1
- RAS-only or CAS-before-RAS refresh or self-refresh
• TTL-compatible, three-state I/O
• JEDEC standard package
- 300 mil, 24/26-pin SOJ
- 300 mil, 24/26-pin TSOP
• Latch-up current ≥ 200 mA
• ESD protection ≥ 2000 mV
• Industrial and commercial temperature available
Pin arrangement
SOJ
TSOP
V_{CC 1}
I/O0 2
I/O1 3
WE 4
RAS 5
*NC/A11 6
26 ^GND
25 ^I/O3
V_{CC 1}
I/O0 2
24 ^I/O2
I/O1 3
23 CAS
WE 4
22 OE
RAS 5
21 A9 *NC/A11 6
26 ^GND
25 ^I/O3
24 ^I/O2
23 CAS
22 OE
21 A9
A10 8
19 ^A8
A10 8
19
A0 9
18 A7
A0 ⁹
18
A1 10
17 A6
A1 ¹⁰
17
A2 11
16 A5
A2 ¹¹
16
A3 ¹²
15 A4
A3 ¹²
15
V_CC ¹³
14
GND
V_CC ¹³
14
*NC on 2K refresh version; A11 on 4K refresh version
A8
A7
A6
A5
A4
GND
Pin designation
Pin(s)
Description
A0 to A11
Address inputs
RAS
Row address strobe
CAS
Column address strobe
WE
Write enable
I/O0 to I/O3
Input/output
OE
Output enable
V_CC
GND
Power
Ground
Selection guide
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
Maximum CMOS standby current
Symbol
t_RAC
t_CAA
t_CAC
t_OEA
t_RC
t_PC
I_CC1
I_CC5
AS4C4M4F0-50
AS4C4M4F1-50
50
25
12
13
85
25
135
1.0
4/11/01; v.0.9
Alliance Semiconductor
AS4C4M4F0-60
AS4C4M4F1-60
Unit
60
ns
30
ns
15
ns
15
ns
100
ns
30
ns
120
mA
1.0
mA
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