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AS4C1M16E5 Datasheet, PDF (1/22 Pages) Alliance Semiconductor Corporation – 5V 1M×16 CMOS DRAM (EDO)
AS4C1M16E5
®
5V 1M×16 CMOS DRAM (EDO)
Features
• Organization: 1,048,576 words × 16 bits
• High speed
- 45/50/60 ns RAS access time
- 20/20/25 ns hyper page cycle time
- 10/12/15 ns CAS access time
• Low power consumption
- Active: 740 mW max (AS4C1M16E5-60)
- Standby: 5.5 mW max, CMOS DQ
• Extended data out
• 1024 refresh cycles, 16 ms refresh interval
- RAS-only or CAS-before-RAS refresh Read-modify-write
• TTL-compatible, three-state DQ
• JEDEC standard package and pinout
- 400 mil, 42-pin SOJ
- 400 mil, 44/50-pin TSOP II
• 5V power supply (AS4C1M16E5)
• 3V power supply (AS4LC1M16E5)
• Industrial and commercial temperature available
Pin arrangement
SOJ
Vcc
1
42
DQ1
2
41
DQ2
3
40
DQ3
4
39
DQ4
5
38
Vcc
6
37
DQ5
7
36
DQ6
8
35
DQ7
9
34
DQ8
10
33
NC
11
32
NC
12
31
WE
13
30
RAS
14
29
NC
15
28
NC
16
27
A0
17
26
A1
18
25
A2
19
24
A3
20
23
Vcc
21
22
VSS
DQ16
DQ15
DQ14
DQ13
VSS
DQ12
DQ11
DQ10
DQ9
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
VSS
TSOP II
VCC
1
DQ1 2
DQ2 3
DQ3 4
DQ4 5
VCC
6
DQ5 7
DQ6 8
DQ7 9
DQ8 10
NC 11
50 VSS
49 DQ16
48 DQ15
47 DQ14
46 DQ13
45 VSS
44 DQ12
43 DQ11
42 DQ10
41 DQ9
40 NC
NC 15
NC 16
WE 17
RAS 18
NC 19
NC 20
A0 21
A1 22
A2 23
A3 24
VCC 25
36 NC
35 LCAS
34 UCAS
33 OE
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
26 VSS
Selection guide
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum hyper page mode cycle time
Maximum operating current
Maximum CMOS standby current
Symbol
tRAC
tAA
tCAC
tOEA
tRC
tHPC
ICC1
ICC5
Pin designation
Pin(s)
Description
A0 to A9
Address inputs
RAS
Row address strobe
DQ1 to DQ16 Input/output
OE
Output enable
WE
Write enable
UCAS
Column address strobe, upper byte
LCAS
Column address strobe, lower byte
VCC
Power
VSS
Ground
-45
-50
-60
Unit
45
50
60
ns
23
25
30
ns
10
12
15
ns
12
13
15
ns
75
80
100
ns
20
20
25
ns
155
145
135
mA
1.0
1.0
1.0
mA
4/11/01; v.1.0
Alliance Semiconductor
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