AS4C14400 Datasheet, PDF (1/16 Pages) Alliance Semiconductor Corporation – 1M-bit × 4 CMOS DRAM (Fast page mode or EDO)

High Performance
1M×4
CMOS DRAM
®
1M-bit × 4 CMOS DRAM (Fast page mode or EDO)
Preliminary information
AS4C14400
AS4C14405
Features
• Organization: 1,048,576 words × 4 bits
• High speed
- 40/50/60/70 ns RAS access time
- 20/25/30/35 ns column address access time
- 10/13/15/18 ns CAS access time
• Low power consumption
- Active: 385 mW max (-60)
- Standby: 5.5 mW max, CMOS I/O
• Fast page mode (AS4C14400) or EDO (AS4C14405)
• 1024 refresh cycles, 16 ms refresh interval
- RAS-only or CAS-before-RAS refresh
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 300 mil, 20/26-pin SOJ
- 300 mil, 20/26-pin TSOP
• Single 5V power supply
• ESD protection ≥ 2001V
• Latch-up current ≥ 200 mA
Pin arrangement
SOJ
I/O0 1
I/O1 2
WE 3
RAS 4
A9 5
26 GND
25 I/O3
24 I/O2
23 CAS
22 OE
A0 ⁹
A1 ¹⁰
A2 ¹¹
A3 ¹²
V_CC ¹³
18 A8
17 A7
16 A6
15 A5
14 A4
TSOP
I/O0 1
I/O1 2
WE 3
RAS 4
A9 5
26 GND
25 I/O3
24 I/O2
23 CAS
22 OE
A0 ⁹
A1 ¹⁰
A2 ¹¹
A3 ¹²
V_CC ¹³
18 A8
17 A7
16 A6
15 A5
14 A4
Pin designation
Pin(s)
A0 to A9
RAS
I/O0 to I/O3
OE
CAS
WE
V_CC
GND
Description
Address inputs
Row address strobe
Input/output
Output enable
Column address strobe
Read/write control
Power (5.0 ± 0.5V)
Ground
Selection guide
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
Maximum CMOS standby current
Shaded areas contain advance information.
Symbol
t_RAC
t_CAA
t_CAC
t_OEA
t_RC
t_PC
I_CC1
I_CC5
4C14400-40 4C14400-50 4C14400-60 4C14400-70 Unit
40
50
60
70
ns
20
25
30
35
ns
10
13
15
18
ns
10
13
15
18
ns
70
90
110
130
ns
30
35
40
45
ns
90
80
70
60
mA
1.0
1.0
1.0
1.0
mA
ALLIANCE SEMICONDUCTOR