A6282 Datasheet, PDF (9/13 Pages) Allegro MicroSystems – 16-Channel Constant-Current LED Driver

A6282
16-Channel Constant-Current LED Driver
Functional Description
Normal Operation
Serial data present at the SDI (Serial Data In) input is transferred
to the shift register on the transition from logic 0 to logic 1 of the
CLK (Clock) input pulse. On succeeding CLK pulses, the register
shifts data towards the SDO (Serial Data Out) output. The serial
data must appear at the input prior to the rising edge of the CLK
waveform.
Data present in any register is transferred to the respective latch
when the LE (Latch Enable) input is high (serial-to-parallel con-
version). The latches continue to accept new data as long as LE is
held high (level triggered).
Applications where the latches are bypassed (LE tied high)
require that the ¯O¯¯E¯ (Output Enable) input be high during serial
data entry. When ^{¯O¯¯E¯} is high, the output sink drivers are disabled
(off). The data stored in the latches is not affected by the state
of ¯O¯¯E¯ . With ¯O¯¯E¯ active (low), the outputs are controlled by the
state of their respective latches.
Setting Maximum Channel Current
The maximum output current per channel is set by a single exter-
nal resistor, REXT, which is placed between the REXT pin and
GND. The voltage on REXT, V_EXT, is set by an internal band gap
and is 1.21 V, typical.
The maximum channel output current can be calculated as:
I_O(max) = (18483.1/ R_EXT) + 0.67 , for V_DD = 3.0 to 3.6 V ,
or
I_O(max) = (18841.2/ R_EXT) + 0.68 , for V_DD = 4.5 to 5.5 V ,
where R_EXT is the value of the user-selected external resistor,
which should not be less than 374 Ω.
A chart of the maximum per channel (OUT0 to OUT15) constant
output current, I_O(max), at various values of R_EXT, is shown in
the Operating Characteristics section.
Undervoltage Lockout
The A6282 includes an internal undervoltage lockout (UVLO)
circuit that disables the outputs in the event that the logic supply
voltage drops below a minimum acceptable level. This feature
prevents the display of erroneous information, a necessary func-
tion for some critical applications. Upon recovery of the logic
supply voltage after a UVLO event, all internal shift registers and
latches are set to 0. The A6282 is then in normal mode.
Thermal Shutdown Protection
If the junction temperature exceeds the threshold temperature,
T_JTSD , 165°C typical, the outputs will be turned off until the junc-
tion temperature cools down through the thermal shutdown hys-
teresis, 15°C typical. The shift register and output latches register
will remain active during a thermal shutdown event. Therefore,
there is no need to reset the data in the output latches.
Allegro MicroSystems, Inc.
9
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com