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A1150 Datasheet, PDF (8/12 Pages) Allegro MicroSystems – Chopper-Stabilized, Two Wire Hall-Effect Switches
A1150, A1152, A1153, A1155,
A1156, A1157, and A1158
Chopper-Stabilized, Two Wire
Hall-Effect Switches
V+
VCC
A115x
GND
A
ECU
GND
RSENSE
CBYP
0.01 μF
A Package UA Only
RSENSE
V+
VCC
A115x
GND
A
GND
CBYP
0.01 μF
(A) Low side sensing
Figure 2. Typical application circuits
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
patented Allegro technique, namely Dynamic Quadrature Offset
Cancellation, removes key sources of the output drift induced by
thermal and mechanical stresses. This offset reduction technique
is based on a signal modulation-demodulation process. The
undesired offset signal is separated from the magnetic field-
induced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
(B) High side sensing
its original spectrum at base band, while the DC offset becomes
a high-frequency signal. The magnetic-sourced signal then can
pass through a low-pass filter, while the modulated DC offset is
suppressed. The chopper stabilization technique uses a 350 kHz
high frequency clock. For demodulation process, a sample and
hold technique is used, where the sampling is performed at twice
the chopper frequency. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall out-
put voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
and-hold circuits.
Regulator
Hall Element
Clock/Logic
Amp
Low-Pass
Filter
Figure 3. Chopper stabilization circuit (Dynamic Quadrature Offset Cancellation)
Allegro MicroSystems, Inc.
8
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com