English
Language : 

8182 Datasheet, PDF (7/8 Pages) Allegro MicroSystems – LOW-DROPOUT, 3 V REGULATOR . HIGH EFFICIENCY
8182
LOW-DROPOUT,
3 V REGULATOR
TYPICAL CHARACTERISTICS (concluded)
LOAD TRANSIENT PERFORMANCE
VI = 3.2 V to 6.2 V, CO = 1 µF, TA = 25°C
ENABLE TRANSIENT PERFORMANCE
VI = 3.2 V to 6.2 V, CO = 1 µF, IO = 60 mA, TA = 25°C
3.5 V
VO 3.0 V
2.5 V
100 mA
IO
1 mA
<100 µs
<300 µs
Dwg. WP-026
3.0 V
VO
0
VI
VE
0
<125 µs
<250 µs
Dwg. WP-027
INPUT, COMPARATOR, & OUTPUT RELATIONSHIPS
The RESET output of the comparator pro-
duces a logic low whenever the COMP input is
below 1.23 V. An out-of-regulation detector can
be configured by dividing down the regulator
output (an R/R divider is typical) and connecting it
to the COMP input. As tne regulator input is
ramped up, the RESET signal becomes valid
(low) at approximately VI = 1.3 V. The RESET
signal will go high when VC = 1.23 V (VO = 2.46 V
with an R/R divider). Comparator hysteresis
prevents oscillations under low battery conditions.
The RESET open-drain output requires an
external pull-up resistor. This can be returned to
either the input supply or the regulator output,
depending on suystem requirements. Note that
the RESET sink current is adds to the battery
drain in a low-battery condition. Suggested
values range from 100 kΩ to 1 MΩ. RESET
should be left unconnected if it is not used.
VI
1.3 V
V
3.0 V
O
VC *
1.23 V
10 V MAX.
VC(hys)
VOR
OUTPUT UNDEFINED
Dwg. WP-025
*Comparator input voltage is normally obtained
from a resistive divider off of the output.