A8583 Datasheet, PDF (20/33 Pages) Allegro MicroSystems – The A8583 is an adjustable frequency, high output current, PWM regulator that integrates a low resistance, high-side, N-channel MOSFET.

A8583
Wide Input Voltage, 2.4 MHz , 3.5 A
Asynchronous Buck Regulator
recommended), f_SW(MIN) is the lowest expected PWM fre-
quency, and ESR_CIN is the equivalent series resistance of the
input capacitor(s).
If we choose ceramic input capacitors (ESR < 5 mΩ), the
I_OUT × ESR_CIN term can be neglected in equation 13. Also, the
D × (1 – D) term has an absolute maximum value of 0.25 at
50% duty cycle. So, for a conservative design, based on
I_OUT = 3.5 A, f_SW(MIN) = 1.6 MHz (2 MHz – 20%), D × (1 – D) =
0.25, and ΔV_IN =100 mV:
3.5 (A) × 0.25
C_IN ≥ _{1.6 (MHz) × 100 (mV)} = 5.5 μF
A good design should consider the DC-bias effect on a ceramic
capacitor: as the applied voltage approaches the rated value, the
capacitance value decreases. This effect is very pronounced with
the Y5V and Z5U temperature characteristic devices (as much as
90% reduction) so these types should be avoided. The X5R and
X7R type capacitors should be the primary choices due to their
stability versus both DC bias and temperature.
For all ceramic capacitors, the DC-bias effect is even more
pronounced on smaller case sizes, so a good design will use the
largest affordable case size (such as 1206 or 1210). Also, it is
advisable to select input capacitors with plenty of design margin
in the voltage rating, to accommodate the worst case transient
input voltage (for example, load dump as high as 40 V for auto-
motive applications).
Asynchronous Diode (D1)
There are three requirements for the asynchronous diode. First,
the asynchronous diode must be able to withstand the regulator
input voltage when the high-side MOSFET is on. Therefore, the
design should have a diode with a reverse voltage rating ( V_r )
higher than the maximum expected input voltage (that is, the
surge voltage). Second, the forward voltage of the diode (V_f )
should be minimized or the regulator efficiency will suffer. Also,
if V_f is too high, the missing diode protection in the A8583 could
be falsely activated. A Schottky-type diode, which can maintain
a very low V_f when the converter output is shorted to ground at
the coldest ambient temperature, is highly recommended. Third,
the asynchronous diode must conduct the output current when
the high-side MOSFET is off. Therefore, the average forward
current rating of this diode (I_f(av) ) must be high enough to deliver
the load current according to equation 14, where D is the duty
cycle (V_OUT + V_f ) / (V_IN + V_f ) and I_OUT(max) is the maximum
continuous ouput current of the regulator:
I_f(av) ≥ I_OUT(max) (1 – D(min))
(14)
To save cost and PCB area, the designer might be tempted to use
a diode with a relatively low current rating and the smallest PCB
footprint. However, doing this usually results in a hotter diode
and lower system efficiency. For the asynchronous converter, the
majority of losses can occur in this diode. To optimize efficiency,
one should use a higher rated, physically larger diode. Also,
diodes with very high reverse voltage ratings usually have higher
forward voltages, which reduces system efficiency. Therefore, a
diode with the lowest possible reverse voltage rating should be
used. However, care should be taken to be sure this diode is not
destroyed during input voltage transients or surge events.
Bootstrap Capacitor (CBOOT)
A bootstrap capacitor must be connected between the BOOT and
SW pins to provide floating gate drive to the high-side MOSFET.
For most applications 100 nF is sufficient. This should be a
high-quality ceramic capacitor, such as an X5R or X7R, with a
voltage rating of at least 16 V. The A8583 incorporates a low-side
MOSFET to insure that the bootstrap capacitor is always charged,
even when the converter is lightly loaded.
Soft Start and Hiccup Mode Timing (CSS)
The soft start time of the A8583 is determined by the value of
the capacitance on the SS pin. When the A8583 is enabled, the
voltage at the SS pin will start from 0 V and will be charged by
the soft start current, I_SSSU (nominally 20 μA). However, PWM
switching will not begin instantly because the voltage at the
SS pin must rise above the COMP release voltage, V_SSRELEASE
(nominally 0.33 V). The soft start delay (t_SSDELAY) can be calcu-
lated using equation 15:
0.33 (V)
t_SSDELAY = C_SS × _ISSSU
(15)
If the A8583 is starting into a full load (nominally 3.5 A) and
the soft start time (t_SS) is too fast, the pulse-by-pulse overcur-
rent threshold may be exceeded and Hiccup mode protection
triggered. This occurs because the total of the full load current,
the inductor ripple current, and the additional current required to
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