A8654 Datasheet, PDF (15/29 Pages) Allegro MicroSystems – Wide Input Voltage, Adjustable Frequency, 3 A, 2 MHz Synchronous Buck Regulator

A8654
Wide Input Voltage, Adjustable Frequency,
3 A, 2 MHz Synchronous Buck Regulator
another hiccup cycle will occur. Hiccups will repeat until the
short circuit is removed or the converter is disabled. If the short
circuit is removed, the A8654 will soft-start normally and the
output voltage will automatically recover to the desired level.
Thus, hiccup mode is a very effective protection for the overload
condition. It can avoid false trigger for a short-term overload. On
the other hand, for the extended overload, the average power dis-
sipation during hiccup operation is very low to keep the control-
ler cool and enhance the reliability.
Note that OCP is the only fault that results in hiccup mode being
ignored while V_SS < 2.3 V.
BOOT Capacitor Protection
The A8654 monitors the voltage across the BOOT capacitor to
detect if the capacitor is missing or short-circuited. If the BOOT
capacitor is missing, the regulator will enter hiccup mode after 7
PWM cycles. If the BOOT capacitor is short-circuited, the regu-
lator will enter hiccup mode after 64 PWM cycles.
For a BOOT fault, hiccup mode will operate virtually the same as
described previously for an output short-circuit fault (OCP), with
SS ramping up and down as a timer to initiate repeated soft-start
attempts. BOOT faults are nonlatched conditions, so the A8654
will automatically recover when the fault is corrected.
Overvoltage Protection (OVP)
The A8654 also includes an overvoltage comparator that moni-
tors the FB pin exceeding 110%. When the voltage at the FB pin
exceeds the overvoltage threshold (V_OUT(OV)), A8654 will stop
PWM switching, i.e. both high- and low-side switches will be
turned off, and NPOR will be pulled low.
In most cases, the error amplifier will be able to maintain regula-
tion since the synchronous output stage has excellent sink and
source capability. However the error amplifier and its regulation
voltage clamp are not effective when the FB pin is disconnected
or when the output is shorted to the input supply. When the FB
pin is disconnected from the feedback resistor divider, a tiny
internal current source will force the voltage at the FB pin to rise
above V_OUT(OV) and disable the regulator, preventing the load
from being significantly overvoltage. If a higher external voltage
is accidently shorted to the A8654’s output, V_FB will rise above
the overvoltage threshold, triggering an OVP event and thus
protecting the low-side switch. In either case, if the conditions
causing the overvoltage are corrected, the regulator will automati-
cally recover.
Thermal Shutdown (TSD)
The A8654 monitors its junction temperature and will stop PWM
switching and pull NPOR low if it becomes too hot. Also, to
prepare for a restart, the SS and COMP pins will be pulled low
until V_SS < V_SS(RST). TSD is a nonlatched fault, so the A8654 will
automatically recover if the junction temperature decreases by
approximately 20°C.
Pin-to-Ground and Pin-to-Pin Short Protec-
tions
The A8654 was designed to satisfy the most demanding automo-
tive and nonautomotive applications. For example, the A8654
was carefully designed “up front” to withstand a short circuit to
ground at each pin without suffering damage.
In addition, care was taken when defining the A8654’s pinout
to optimize protection against pin-to-pin adjacent short circuits.
For example, logic pins and high voltage pins were separated as
much as possible. Inevitably, some low-voltage pins were located
adjacent to high-voltage pins. In these instances, the low-voltage
pins were designed to withstand increased voltages, with clamps
and/or series input resistance, to prevent damage to the A8654.
Allegro MicroSystems, LLC
15
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com