A4980 Datasheet, PDF (11/44 Pages) Allegro MicroSystems – The A4980 is a flexible microstepping motor driver with built-in translator for easy operation.

A4980
Automotive, Programmable Stepper Driver
one of the latched faults (for example, a bridge short circuit) has
been detected and the outputs disabled.
Alternative to the Fault Output flag, the DIAG output can be pro-
grammed via the serial interface to output: the stall detect signal,
which goes low when a stall is detected; the phase A PWM-on
signal, which is high during the phase A PWM on-time; or an
analog signal indicating the silicon temperature.
If required, specific fault information can be determined by read-
ing the diagnostic registers (see Serial Interface section).
The first bit (bit 15) in both diagnostic registers contains a com-
mon Fault Register flag which will be high if any of the fault bits
in either register has been set. This allows a fault condition to be
detected using the serial interface, by simply taking STRn low.
As soon as STRn goes low the fist bit in the diagnostic registers
can be read to determine if a fault has been detected at any time
since the last diagnostic registers reset. In all cases the fault bits
in the diagnostic registers are latched and only cleared after a
diagnostic registers reset.
Note that the Fault Register flag in the diagnostic registers, does
not provide the same function as the Fault Output flag on the
DIAG pin. The Fault Output flag on the DIAG pin provides an
indication that either a fault is present or the outputs have been
disabled due to a short circuit fault. The Fault Register flag sim-
ply provides an indication that a fault has occurred since the last
diagnostic registers reset and has been latched.
Table 1. Fault Table
Diagnostic
Action
VBB Overvoltage
Disable outputs, set
Fault Register flag
VBB Undervoltage Set Fault Register flag
VREG Undervoltage
Disable outputs, set
Fault Register flag
VDD Undervoltage
Power-down,
full reset
Temperature Warning Set Fault Register flag
Overtemperature
Disable outputs, set
Fault Register flag
Bridge Short
Disable outputs, set
Fault Register flag
Bridge Open
Set Fault Register flag
Stall Detect
Set ST flag
Latched
No
No
No
No
No
No
Yes
No
No
At the system level the supply voltages and chip temperature are
monitored.
Supply Voltage Monitors
The logic supply, the motor supply, and the regulator output are
monitored: the motor supply for overvoltage, and the regulator
output and logic supply for undervoltage.
• If the motor supply voltage, V_BBA and V_BBB , goes above the
VBB overvoltage threshold, the A4980 will disable the outputs
and indicate the fault. When the motor supply voltage goes be-
low the VBB overvoltage threshold, the outputs will be re-en-
abled and the fault flag removed. The fault bits in the diagnostic
registers remain set until cleared by a diagnostic registers reset.
• If the motor supply voltage, V_BBA and V_BBB , goes below the
VBB undervoltage threshold, the A4980 will indicate the fault
and reduce the VREG undervoltage threshold to the low level.
When the motor supply voltage goes above the VBB under-
voltage threshold, the VREG undervoltage threshold will be
increased to the high level and the fault flag removed. The fault
bits in the diagnostic registers remain set until cleared by a
diagnostic registers reset.
• If the output of the internal regulator, V_REG , goes below the
VREG undervoltage threshold, the A4980 will disable the
outputs and indicate the fault. When the regulator output rises
above the VREG undervoltage threshold, the outputs will be
re-enabled and the fault flag removed. The fault bits in the diag-
nostic registers remain set until cleared by a diagnostic registers
reset.
• If the logic supply voltage, V_DD , goes below the VDD under-
voltage threshold, the A4980 will be completely disabled except
to monitor the V_DD voltage level. When the logic supply voltage
rises above the VDD undervoltage threshold, a power-on reset
will take place and all registers will be reset to the default state.
Note that both the VREG undervoltage monitor and the V_BB
undervoltage monitor indicate a fault by using the same fault
bit, UV, in both Fault registers. The state of the UV fault bit is
determined by the logical OR of the fault output from these two
undervoltage monitors.
The VREG undervoltage threshold level is determined by the
state of the VBB undervoltage monitor. If V_BB falls enough to
create a VBB undervoltage fault, then the VREG threshold is
reduced to the low level, V_REGUVL. When V_BB is above the VBB
undervoltage threshold, the VREG undervoltage threshold is set
to the high level, V_REGUVH . This allows the A4980 to continue to
drive a stepper motor with a motor supply (VBB) voltage as low
Allegro MicroSystems, Inc.
11
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com