UDK2559EBTR Datasheet, PDF (1/8 Pages) Allegro MicroSystems – Protected Quad Power Driver

2559
Protected Quad Power Driver
Features and Benefits
▪ 700 mA output current per channel
▪ Independent overcurrent protection for each driver
▪ Thermal protection for device and each driver
▪ Low output-saturation voltage
▪ Integral output flyback diodes
▪ TTL and 5 V CMOS-compatible inputs
Packages:
16-pin DIP
with exposed thermal tabs
(B package)
28-pin PLCC
(Package EB)
Not to scale
16-pin SOICW
with internally fused pins
(LB package)
Description
Providing improved output current limiting, the UDK,
UDN, and UDQ2559B, EB, and LB quad power drivers
combine AND logic gates and high-current bipolar outputs
with complete output protection. Each of the four outputs
sink 700 mA in the on state. The outputs have a minimum
breakdown voltage (load dump) of 60 V and a sustaining
voltage of 40 V. The inputs are compatible with TTL and
5 V CMOS logic systems.
Overcurrent protection for each channel has been designed
into these devices and is activated at approximately 1 A. It
protects each output from short circuits with supply voltages
up to 25 V. When an output current trip point is reached, that
output stage is driven linearly resulting in a reduced output
current level. If an over-current or short-circuit condition
continues, the thermal-limiting circuits will first sense the rise
in junction temperature and then the rise in chip temperature,
further decreasing the output current. Under worst-case
conditions, these devices will tolerate short circuits on all
outputs, simultaneously.
These devices can be used to drive various loads including
incandescent lamps (without warming or limiting resistors)
or inductive loads such as relays, solenoids, or dc stepping
motors.
The packages offer fused leads for enhanced thermal dissipation.
Package B is a 16-pin power DIP with exposed tabs, EB is a
28-lead power PLCC, and LB is a 16-lead power wide-body
SOIC for surface-mount applications. The lead (Pb) free
versions have 100% matte tin leadframe plating.
ENABLE
IN_N
Functional Block Diagram
(1 of 4 Channels)
V_CC
K
OUT_N
Thermal
Limit
<< 1Ω
29317.14K