A8302 Datasheet, PDF (1/45 Pages) Allegro MicroSystems – Dual LNB Supply and Control Voltage Regulators

A8302
Dual LNB Supply and Control Voltage Regulators
Features and Benefits
▪ Integrated boost MOSFET, current sensing, and
compensation
▪ Configurable boost capacitor option through I²C™ control
register: ceramic or electrolytic
▪ Two switching frequency settings programmable through
I²C™ control register (563 kHz and 939 kHz)
▪ Adjustable LNB output current limit from 250 to 950 mA
▫ Covers a wide array of application requirements
▫ Minimizes component sizing to fit each application
▫ For startup, reconfiguration, and continuous output
▫ Optional temporary increased current limit (+25%)
▫ Internal gate drive output BFGATEx for bypass FET used
in DiSEqC™ applications
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Package: 32-contact MLP/QFN with
exposed thermal pad (suffix ET)
Description
TheA8302 is a dual channel low noise block converter regulator
(LNBR). The A8302 consists of a monolithic linear and
switching voltage regulator, specifically designed to provide
the power and the interface signals to an LNB down converter
via coaxial cable in satellite TV receivers systems. The A8302
requires few external components, with the boost switch and
compensation circuitry integrated inside of the device. The boost
converter switching frequency and user-controlled current limit
minimize the size of the passive filtering components. User
controlled current limit and two switching frequency settings
allow to optimize size of passive filtering components.
A sleep pin is available to maximize power savings and to
quickly shut down the device if needed, without using I²C™
control.
The A8302 has integrated tone detection capability
and the internal driver allows full two-way DiSEqC™
communications. For DiSEqC™ communication, the IC
provides an internal 22-kHz tone that is gated with the
TONECTRLx pin or accepts an external 22-kHz tone through
the TONECTRLx pin.
8302-DS
5 mm × 5 mm × 0.90 mm
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Functional Block Diagram
(One of two channels shown, x in pin name indicates channel: 1 or 2)
GNDLXx
LXx BOOSTx
VCPx
VIN
VREG
SLEEP
TCAPx
TONECTRLx
SDA
SCL
ADD
IRQ
TDOx
IC
Power
DAC
563/939
kHz Osc
CLK
BOOST_REF
0.8 V
+
Ref
Slew
Rate
Limiter
4
VSEL3-0
I²C
Interface
Read
Fault
TMODE
Unlatched
Status
PNG, CPOK
EPF & TDET
SET Latched Faults:
UVLO
RST Latched or Auto-
restart Faults:
OCP and TSD
ADJ
Tone
TDET Detector
V_FB
Boost
Regulator
Charge
Pump
+ ^LNBREF
V_IN
Linear
Regulator
ILIM OC
Tone
Generator
EPF_TH
TDIS_T
V_IN
OC Timer
45/28 ms
TSD
RS MODE
10 kΩ
LNBx
100 kΩ
10 kΩ
GND
LNBx
ISETx
EPF
TDIx
BFGATEx