A6812EEP-T Datasheet, PDF (1/9 Pages) Allegro MicroSystems – DABiC-IV 20-Bit Serial-Input Latched Source Driver

A6812
DABiC-IV 20-Bit Serial-Input
Latched Source Driver
Features and Benefits
▪ Controlled output slew rate
▪ High-speed data storage
▪ 60 V minimum output break down
▪ High data-input rate
▪ PNP active pull-downs
▪ Low output-saturation voltages
▪ Low-power CMOS logic and latches
▪ Improved replacements for TL5812x, UCN5812x, and
UCQ5812x
Package:
28-pin SOICW
(Package LW)
Not to scale
28-pin PLCC
(EP package)
Description
The A6812 device combines a 20-bit CMOS shift register,
accompanying data latches and control circuitry with bipolar
sourcing outputs ,and PNP active pull-downs. Designed
primarily to drive vacuum-fluorescent displays, the 60 V and
-40 mA output ratings also allow these devices to be used in
many other peripheral power driver applications. The A6812
features an increased data-input rate (compared with the older
UCN/UCQ5812-F) and a controlled output slew rate.
The CMOS shift register and latches allow direct interfacing
with microprocessor-based systems. With a 3.3 or 5 V logic
supply, they operate to at least 10 MHz.
A CMOS serial data output permits cascaded connections in
applications requiring additional drive lines. Similar devices
are available as the A6810 (10-bit) and A6818 (32-bit).
The A6812 output source drivers are NPN Darlingtons,
capable of sourcing up to 40 mA. The controlled output slew
rate reduces electromagnetic noise, which is an important
consideration in systems that include telecommunications
and/or microprocessors and to meet government emissions
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Functional Block Diagram
26182.126F