A6810 Datasheet, PDF (1/8 Pages) Allegro MicroSystems – DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER

6810
A6810xA
OUT₈ 1
OUT₇ 2
OUT₆ 3
CLOCK 4 ^CLK
GROUND 5
LOGIC
SUPPLY
6 V_DD
STROBE 7 ST
OUT ₅ 8
OUT₄ 9
18 OUT ₉
LATCHES
REGISTER
REGISTER
LATCHES
17 OUT ₁₀
16
SERIAL
DATA OUT
V_BB 15
LOAD
SUPPLY
14 ^SERIAL
DATA IN
BLNK 13 BLANKING
12 OUT₁
11 OUT ₂
10 OUT ₃
Dwg. PP-029
ABSOLUTE MAXIMUM RATINGS
at T_A = 25°C
Logic Supply Voltage, V_DD ................... 7.0 V
Driver Supply Voltage, V_BB ................... 60 V
Continuous Output Current Range,
I_OUT ......................... -40 mA to +15 mA
Input Voltage Range,
V_IN ....................... -0.3 V to V_DD + 0.3 V
Package Power Dissipation,
P_D ........................................ See Graph
Operating Temperature Range, T_A
(Suffix ‘E–’) .................. -40°C to +85°C
(Suffix ‘S–’) .................. -20°C to +85°C
Storage Temperature Range,
T_S ............................... -55°C to +125°C
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
DABiC-IV, 10-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
The A6810– devices combine 10-bit CMOS shift registers, accom-
panying data latches and control circuitry with bipolar sourcing outputs
and pnp active pull downs. Designed primarily to drive vacuum-
fluorescent displays, the 60 V and -40 mA output ratings also allow
these devices to be used in many other peripheral power driver applica-
tions. The A6810– feature an increased data input rate (compared with
the older UCN/UCQ5810-F) and a controlled output slew rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply,
serial-data input rates of at least 10 MHz .
A CMOS serial data output permits cascade connections in applica-
tions requiring additional drive lines. Similar devices are available as
the A6812– (20 bits) and A6818– (32 bits).
The A6810– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electro-
magnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANK-
ING input high. The pnp active pull-downs will sink at least
2.5 mA.
The A6810– are available in two temperature ranges for optimum
performance in commercial (suffix S-) or industrial (suffix E-) applica-
tions. They are provided in two package styles for through-hole DIP
(suffix -A) or minimum-area surface-mount SOIC (suffix -LW).
Copper lead frames, low logic-power dissipation, and low output-
saturation voltages allow all devices to source 25 mA from all outputs
continuously over the maximum operating temperature range.
FEATURES
s Controlled Output Slew Rate
s High-Speed Data Storage
s 60 V Minimum
Output Breakdown
s High Data Input Rate
s PNP Active Pull-Downs
s Improved Replacements
for TL4810–, UCN5810–,
and UCQ5810–
s Low Output-Saturation Voltages
s Low-Power CMOS Logic
and Latches
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A or -LW). Always
order by complete part number, e.g., A6810SLW .