A3977SED-T Datasheet, PDF (1/19 Pages) Allegro MicroSystems – Microstepping DMOS Driver with Translator

A3977
Microstepping DMOS Driver with Translator
Features and Benefits
▪ ±2.5 A, 35 V output rating
▪ Low r_DS(on) outputs, 0.45 Ω source, 0.36 Ω sink typical
▪ Automatic current decay mode detection/selection
▪ 3.0 to 5.5 V logic supply voltage range
▪ Mixed, fast, and slow current decay modes
▪ Home output
▪ Synchronous rectification for low power dissipation
▪ Internal UVLO and thermal shutdown circuitry
▪ Crossover-current protection
Packages:
Package ED, 44-pin PLCC
with internally fused pins
Package LP, 28-pin TSSOP
with exposed thermal pad
Not to scale
Description
TheA3977 is a complete microstepping motor driver, with built-
in translator. It is designed to operate bipolar stepper motors in
full-, half-, quarter-, and eighth-step modes, with output drive
capability of 35 V and ±2.5 A. The A3977 includes a fixed
off-time current regulator that has the ability to operate in
slow-, fast-, or mixed-decay modes. This current-decay control
scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the
A3977. Simply inputting one pulse on the STEP input drives the
motor one step (two logic inputs determine if it is a full-, half-,
quarter-, or eighth-step). There are no phase-sequence tables,
high-frequency control lines, or complex interfaces to program.
The A3977 interface is an ideal fit for applications where a
complex microprocessor is unavailable or over-burdened.
Internal synchronous-rectification control circuitry is provided
to improve power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage lockout (UVLO) and crossover-current
protection. Special power-up sequencing is not required.
The A3977 is supplied in a choice of two power packages, a
44-pin plastic PLCC with 3 internally-fused pins on each of
four sides (suffix ED), and a thin (<1.2 mm), 28-pin TSSOP
with an exposed thermal pad (suffix LP). Both packages are
lead (Pb) free, with 100% matte tin leadframe plating.
Pin-out Diagram
26184.22K
NC 7
6
5
4
3
2
1 44 43 42 41 40
VBB1
NC 8
PFD 9
RC1 10
PWM
TIMER
GND 11
GND 12
GND 13
REF 14
÷8
REG
RC2 15
LOGIC
SUPPLY ^{16 VDD}
NC 17
VBB2
18 19 20 21 22 23 24 25 26 27 28
39 NC
38 CP2
37 CP1
36 VCP
35 GND
34 GND
33 GND
32 VREG
31 STEP
30 NC
29 NC
Dwg. PP-075-1