ALD810018 Datasheet, PDF (1/6 Pages) Advanced Linear Devices – QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB) MOSFET ARRAY

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ALD810018/ALD910018
QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB^™) MOSFET ARRAY
GENERAL DESCRIPTION
The ALD810018/ALD910018 are members of the ALD8100xx
(quad) and ALD9100xx (dual) family of Supercapacitor Auto Bal-
ancing MOSFETs, or SAB™ MOSFETs. SAB MOSFETs are built
with production proven EPAD^® technology and are designed to ad-
dress voltage and leakage-current balancing of supercapacitors
connected in series. Supercapacitors, also known as ultracapacitors
or supercaps, connected in series can be leakage-current balanced
by using a combination of one or more devices connected across
each supercapacitor stack to prevent over-voltages.
The ALD810018 offers a set of unique, precise operating voltage
and current characteristics for each of four SAB MOSFET devices,
as shown in its Operating Electrical Characteristics table. It can be
used to balance up to four supercapacitors connected in series.
The ALD910018 has its own set of unique precision Operating Elec-
trical Characteristics for each of its two SAB MOSFET devices,
suitable for up to two series-connected supercapacitors.
Each SAB MOSFET features a precision gate threshold voltage in
the V_t mode, which is 1.80V when the gate-drain source terminals
(V_GS = V_DS) are connected together at a drain-source current of
I_DS(ON) = 1µA. In this mode, input voltage V_IN = V_GS = V_DS. Dif-
ferent V_IN produces an Output Current I_OUT = I_DS(ON) character-
istic and results in an effective variable resistor that varies in value
exponentially with V_IN. This V_IN, when connected across each
supercapacitor in a series, balances each supercapacitor to within
its voltage and current limits.
When V_IN = 1.80V is applied to an ALD810018/ALD910018, its
I_OUT is 1µA. For a 100mV increase in V_IN, to 1.90V, I_OUT increases
by about tenfold. For an additional increase in V_IN to 2.02V for the
ALD910018 (2.04V for the ALD810018), I_OUT increases one hun-
dredfold, to 100µA. Conversely, for a 100mV decrease in V_IN to
1.70V, I_OUT decreases to one tenth of its previous value, to 0.1µA.
Another 100mV decrease in input voltage would reduce I_OUT to
0.01µA. Hence, when an ALD810018/ALD910018 SAB MOSFET
is connected across a supercapacitor that charges to less than
1.60V, it would dissipate essentially no power.
(Continued on next page)
PRODUCT FAMILY SPECIFICATIONS
For more information on supercapacitor balancing, how SAB
MOSFETs achieve automatic supercapacitor balancing, the device
characteristics of the SAB MOSFET family, product family product
selection guide, applications, configurations, and package infor-
mation, please download from www.aldinc.com the document:
“ALD8100xx/ALD9100xx Family of Supercapacitor Auto Balanc-
ing (SAB™) MOSFET ARRAYs”
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Package
Operating Temperature Range
0°C to +70°C
-40°C to +85°C
(Commercial)
(Industrial)
16-Pin SOIC ALD810018SCL
ALD810018SCLI
8-Pin SOIC ALD910018SAL
ALD910018SALI
FEATURES & BENEFITS
• Simple and economical to use
• Precision factory trimmed
• Automatically regulates and balances leakage currents
• Effective for supercapacitor charge-balancing
• Balances up to 4 supercaps with a single IC package
• Balances 2-cell, 3-cell, 4-cell series-connected supercaps
• Scalable to larger supercap stacks and arrays
• Near zero additional leakage currents
• Zero leakage at 0.3V below rated voltages
• Balances series and/or parallel-connected supercaps
• Leakage currents are exponential function of cell voltages
• Active current ranges from <0.3nA to >1000µA
• Always active, always fast response time
• Minimizes leakage currents and power dissipation
APPLICATIONS
• Series-connected supercapacitor cell leakage balancing
• Energy harvesting
• Long term backup battery with supercapacitor outputs
• Zero-power voltage divider at selected voltages
• Matched current mirrors and current sources
• Zero-power mode maximum voltage limiter
• Scaled supercapacitor stacks and arrays
PIN CONFIGURATIONS
ALD810018
IC* 1
M1
D_{N1 2}
16 IC*
M2
15 DN2
G_N1 3
S_{N1 4} ^V-
V- 5
D_{N4 6}
M4
14 G_N2
V- _{13 SN2}
12 V+
M3 _{11 DN3}
G_{N4 7}
S_N4 8
10 ^GN3
V-
V- _{9 SN3}
SCL PACKAGE
ALD910018
IC* 1 V-
8 V+
G_N1 2
7 GN2
D_N1 3
6 DN2
S_N1 4
5 SN2, V-
SAL PACKAGE
*IC pins are internally connected, connect to V-
©2014 Advanced Linear Devices, Inc., Vers. 2.0
www.aldinc.com
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