ALD1103 Datasheet, PDF (1/6 Pages) Advanced Linear Devices – DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR

ADVANCED
LINEAR
DEVICES, INC.
DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR
ALD1103
GENERAL DESCRIPTION
The ALD1103 is a monolithic dual N-channel and dual P-channel matched
transistor pair intended for a broad range of analog applications. These
enhancement-mode transistors are manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process. It consists of an
ALD1101 N-channel MOSFET pair and an ALD1102 P-channel MOSFET
pair in one package.
The ALD1103 offers high input impedance and negative current temperature
coefficient. The transistor pair is matched for minimum offset voltage and
differential thermal response, and it is designed for precision signal
switching and amplifying applications in +2V to +12V systems where low
input bias current, low input capacitance and fast switching speed are
desired. Since these are MOSFET devices, they feature very large (almost
infinite) current gain in a low frequency, or near DC, operating environment.
When used in pairs, a dual CMOS analog switch can be constructed. In
addition, the ALD1103 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
The ALD1103 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
FEATURES
• Thermal tracking between N-channel and P-channel pairs
• Low threshold voltage of 0.7V for both N-channel &
P-channel MOSFETS
• Low input capacitance
• Low Vos -- 10mV
• High input impedance -- 10¹³â„¦ typical
• Low input and output leakage currents
• Negative current (I_DS) temperature coefficient
• Enhancement mode (normally off)
• DC current gain 10⁹
• Matched N-channel and matched P-channel in one package
APPLICATIONS
• Precision current mirrors
• Complementary push-pull linear drives
• Analog switches
• Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog inverter
• Precision matched current sources
PIN CONFIGURATION
DN1 1
GN1 2
14 DN2
13 GN2
SN1 3
V^- 4
12 SN2
11 V⁺
DP1 5
10 DP2
GP1 6
9 GP2
SP1 7
8 SP2
DB, PB, SB PACKAGE
BLOCK DIAGRAM
N GATE 1 (2)
N DRAIN 1 (1)
N DRAIN 2 (14)
N SOURCE 1 (3)
SUBSTRATE (4)
N SOURCE 2 (12)
N GATE 2 (13)
ORDERING INFORMATION
Operating Temperature Range*
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14-Pin
CERDIP
Package
14-Pin
Plastic Dip
Package
14-Pin
SOIC
Package
ALD1103 DB
ALD1103 PB
ALD1103 SB
* Contact factory for industrial temperature range.
P GATE 1 (6)
P DRAIN 1 (5)
P DRAIN 2 (10)
P SOURCE 1 (7)
SUBSTRATE (11)
P SOURCE 2 (8)
P GATE 2 (9)
© 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: [phone] Fax: [phone] http://www.aldinc.com