ALD1102_12 Datasheet, PDF (1/6 Pages) Advanced Linear Devices – DUAL P-CHANNEL MATCHED MOSFET PAIR

ADVANCED
LINEAR
DEVICES, INC.
ALD1102A/ALD1102B
ALD1102
DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION
The ALD1102 is a monolithic dual P-channel matched transistor pair
intended for a broad range of analog applications. These enhancement-
mode transistors are manufactured with Advanced Linear Devices' en-
hanced ACMOS silicon gate CMOS process.
The ALD1102 offers high input impedance and negative current tempera-
ture coefficient. The transistor pair is matched for minimum offset voltage
and differential thermal response, and it is designed for switching and
amplifying applications in +2V to +12V systems where low input bias
current, low input capacitance and fast switching speed are desired. Since
these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1101, a dual CMOS analog switch can be constructed.
In addition, the ALD1102 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
APPLICATIONS
• Precision current mirrors
• Precision current sources
• Analog switches
• Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog inverter
PIN CONFIGURATION
The ALD1102 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
SOURCE ₁ 1
GATE ₁ 2
DRAIN ₁ 3
NC 4
8 SUBSTRATE
7 SOURCE 2
6 GATE ₂
5 DRAIN 2
FEATURES
• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 10¹²â„¦ typical
• Low input and output leakage currents
• Negative current (I_DS) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 10⁹
• RoHS compliant
TOP VIEW
SAL, PAL, DA PACKAGES
* NC pin is internally connected. Do not connect externally.
BLOCK DIAGRAM
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range
0°C to +70°C
0°C to +70°C
-55°C to +125°C
8-Pin
Small Outline
Package (SOIC)
8-Pin
Plastic Dip
Package
8-Pin
CERDIP
Package
ALD1102ASAL
ALD1102BSAL
ALD1102SAL
ALD1102APAL
ALD1102BPAL
ALD1102PAL
ALD1102DA
* Contact factory for leaded (non-RoHS) or high temperature versions.
GATE 1 (2)
DRAIN 1 (3)
DRAIN 2 (5)
SOURCE 1 (1)
SUBSTRATE (8)
SOURCE 2 (7)
GATE 2 (6)
Rev 2.0 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: [phone] Fax: [phone]
www.aldinc.com