AK9844A Datasheet, PDF (9/17 Pages) Asahi Kasei Microsystems – 4Kbit EEPROM with 4ch 8bit D/A Converter

ASAHI KASEI
[AK9844A]
„ READ
The read instruction is the only instruction which outputs serial data on the DO pin.
After a read instruction is received, the instruction and address are decoded, followed by data
transfer from the memory register into a 16 bit serial-out shift register. When the 17th falling edge
of SK is received, the DO pin will come out of high impedance state and shift out the data from D15
first in descending order which is located at the address specified in the instruction.
○ Sequential register read
The data in the next address can be read sequentially to provide clock. The memory
automatically cycles to the next register after each 16 data bits are clocked out.
The sequential register read function is effective for address: A7~A0. When the highest address
is reached ($0FF/$103), the address counter rolls over to address $000/$100 allowing the read
cycle to be continued indefinitely.
CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
31 32 33 34 35
SK
DI
1 0 1 0 1 0 0 A8 A7 A6 A5 A4 A3 A2 A1 A0
DO
Hi-Z
D15 D14 D13
D1 D0 D15 D14 D13
Hi-Z
Status output (READY),
if previous instruction is WRITE.
1st Data
2nd Data
READ instruction
„ WREN / WRDS
When VCC is applied to the part, it powers up in the programming disable(WRDS) state.
Programming must be preceded by a programming enable(WREN) instruction. Programming
remains enabled until a programming disable(WRDS) instruction is executed or VCC is removed
from the part. The programming disable instruction is provided to protect against accidental data
disturb. Execution of a read instruction is not affected by both WREN and WRDS instruction.
CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
SK
DI
DO
101000
XXXXXXXX
WREN=11
WRDS=00
Hi-Z
Status output (READY),
if previous instruction is WRITE.
WREN / WRDS instruction
DAD05E-00
-9-
2005/03