AK8135S Datasheet, PDF (9/16 Pages) Asahi Kasei Microsystems – Multi Clock Generator with VCFS

[AK8135S]
４．ジッターの定義
1. Cycle to cycle jitter: The variation in cycle time of a single between adjacent cycles, over a random
sample of adjacent cycle pairs.
CLK1-5
1/2VDD
t_{cycle n}
t_{cycle n+1}
Jit_cycle = ( t_{cycle n} - t_{cycle n+1} ) : where t_{cycle n} and t_{cycle n+1} are any two adjacent cycles measured on
controlled edges.
2. Period jitter: The deviation in cycle time of a signal with respect to the ideal period over a random
sample of cycles. pairs.
REF1-3
1/2VDD
t_{cycle n}
Jit_period = t_{cycle n} - 1 / f0 : where f0 is the nominal output frequency and tcycle n is any cycle
within the sample measured on controlled edges
3. Long Term jitter:
LTJ
1/2VDD
Vref
1000 cycles
1000Cycles after oscilloscope trigger.
draft-J-00
-9-
2011/04