AK4112B_12 Datasheet, PDF (9/31 Pages) Asahi Kasei Microsystems – High Feature 96kHz 24bit DIR

[AK4112B]
OPERATION OVERVIEW
„ Non-PCM (AC-3, MPEG, etc.) Stream Detect
The AK4112B has a Non-PCM steam auto detect function. When the 32bit mode Non-PCM preamble based on Dolby
“AC-3 Data Stream in IEC958 Interface” is detected, the AUTO goes “H”. The 96bit sync code consists of 0x0000,
0x0000, 0x0000, 0x0000, 0xF872 and 0x4E1F. Detection of this pattern will set the AUTO “H”. Once the AUTO is set
“H”, it will remain “H” until 4096 frames pass through the chip without additional sync pattern being detected. When
those preambles are detected, the burst preambles Pc and Pd that follow those sync codes are stored to registers
0DH-10H.
„ Clock Recovery and 96kHz Detect
On chip low jitter PLL has a wide lock range with 22kHz to 108kHz and the lock time is less than 20ms. The 96kHz
detect output pin FS96 goes “H” when the sampling rate is 88.2kHz or more and “L” at 54kHz or less. In X’tal Mode, the
FS96 pin outputs the value which is set by XFS96. PLL loses lock when the received sync interval is incorrect.
„ Master Clock
The AK4112B has two clock outputs, MCKO1 and MCKO2. These clocks are derived from either the recovered clock or
from the X'tal oscillator. The frequencies of the master clock outputs (MCKO1 & MCKO2) are set by OCKS0 and
OCKS1 as shown in Table 1. 96kHz sampling is not supported at No.2.
No. OCKS1 OCKS0
0
0
0
1
0
1
2
1
0
3
1
1
MCKO1
256fs
256fs
512fs
MCKO2
X’tal
256fs
256fs
128fs
256fs
256fs
512fs
Test Mode
fs (kHz)
32, 44.1, 48, 96
32, 44.1, 48, 96
32, 44.1, 48
Default
Table 1. Master clock frequencies select
„ Clock Operation Mode
The CM0 and CM1 select the clock source of MCKO1/2 and the data source of SDTO via the dedicated pins or the
control register. In Mode 2, the clock source is switched from PLL to X'tal when PLL goes unlock state. In Mode3, the
clock source is fixed to X'tal, but PLL is also operating and the recovered data such as C bits can be monitored.
Mode
0
1
2
3
CM1
0
0
1
1
CM0 UNLOCK PLL X'tal Clock source FS96
0
-
ON OFF
PLL
RFS96
1
-
OFF ON
X'tal
XFS96
0
ON
ON
0
1
ON
ON
PLL
RFS96
X'tal
XFS96
1
-
ON
ON
X'tal
XFS96
ON: Oscillation (Power-up), OFF: STOP (Power-down)
SDTO
RX
DAUX
RX
DAUX
DAUX
Default
Table 2. Clock Operation Mode select
MS0078-E-03
-9-
2012/01