AK8139A Datasheet, PDF (8/12 Pages) Asahi Kasei Microsystems – 26MHz Clock Source Multi Clock Generator

[AK8139A]
5．ジッターの定義
1. Period jitter: The deviation in cycle time of a signal with respect to the ideal period over a random
sample of cycles. pairs.
CLK1, 2, 3,
1/2VDDO
REF
t_{cycle n}
Jit_period = t_{cycle n} - 1 / f0 : where fo is the nominal output frequency and tcycle n is any
cycle within the sample measured on controlled edges
2. Cycle to cycle jitter: The variation in cycle time of a single between adjacent cycles, over a random
sample of adjacent cycle pairs.
CLK1, 2, 3,
REF
t_{cycle n}
t_{cycle n+1}
1/2VDDO
Jit_cycle = | t_{cycle n} - t_{cycle n+1} | : where t_{cycle n} and t_{cycle n+1} are any two adjacent cycles measured on
controlled edges.
rev.J_04
-8-
2013/2