AK4204 Datasheet, PDF (8/13 Pages) Asahi Kasei Microsystems – Stereo Cap-less LINE-Amp and Video-Amp

[AK4204]
■ Audio Circuit Power-Up Sequence
The audio circuit of the AK4204 is powered-up when the APDN pin becomes “H”.
(Note) The charge pump starts operation when the APDN pin or VPDN pin is “H”.
The figure below shows an example of when the VPDN pin becoes “H” before the APDN pin.
Power Supply
VDD1, VDD2
3.0V
VPDN: “L” ⇒“H” (Note)
APDN
(1)
Charge Pump
VEE
Power down VEE=0V
-1.85V
(a)
(b)
Power up VEE=Negative voltage
Audio Timer
Circuit
LINP/RINP
LOUT/ROUT
Mute=0V
(2)
time A
Audio Input Signal
Hi-Z
Mute=0V
Figure 6. System Reset Diagram
(1) When VDD1 and VDD2 are powered-up, audio analog output is connected to VSS internally via a mute switch.
The charge pump is powered-up in slow start mode, and the VEE voltage reachs -1.85V in 0.4ms.
(2) When the VEE reachs -1.85V, the audio timer circuit starts counting the “timeA” period (max. 15ms). If the APDN
pin becomes “H” before the “timeA” period starts (a), the mute switch is released after the “timeA” period and the
audio output is enabled. If the APDN pin becomes “H” after the “timeA” period (b), mute is released immediately.
(3) No audible click noise occurs by inputting 0V to the LINP/RINP pin until the end of “timeA” period.
Rev. 0.1
2012/02
-8-